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Sample Projects for C64x+?

Other Parts Discussed in Thread: OMAP3530, CCSTUDIO

Here is what I have:

1) Mistral OMAP35xx Dev/EVal kit (with OMAP3530 module)

2) CCS v3.3

3) XDS510 JTAG Emulator

I have some benchmark test functions that uses a number of C64x+ libraries (ie math & fft functions). Are there sample projects that will allow me to "quickly" insert these test functions into the project to run? I want to be able to record the processor load through CCS when the test functions are running on the OMAP3530 processor.

  • I'm not aware of any shell example projects for the C64x+ DSP in the OMAP3530 readily available.

    The main thing to consider is the C64x+ (IVA) subsystem needs to be brought out of reset, have its clock enabled, etc. by the ARM Cortex-A8.  There should be some GEL files available with the CCS installation that provide this quick functionality.
    This implies you will actually need to connect to the Cortex-A8 using CCS, run the GEL script to enable the IVA subsystem.  Then you will be able to connect to the IVA subsystem with CCS.

    An example GEL file is C:\CCStudio_v3.3\boards\omap35xx_3430\gel\Mistral_Omap35xx_CortexA8.gel.
    The GEL function to use is C64xPlusRelease_FromReset(), I believe.

     

  • If you just want to get some performance approximations it would probably be easier to use the C64x+ simulator in CCS as opposed to using the OMAP silicon itself, at least for starters, as there are a number of examples out there that you could use very quickly. There are some basic examples (such as hello world) within the BIOS install directory in CCS which are probably a good place to start, I usually use one of these as a basis when I need to set up a test case as opposed to making up a new project from scratch. You can probably get one of these to work on the OMAP silicon (starting with some other C64x+ based device like C6455 or DM6437), though I do not believe any are specific to the OMAP3 out of the box.

  • Bernie/Brandon, thanks for the quick response.

     

    1) For the simulator I've noticed that there is the C64x+ CPU Cycle Accurate Simulator and C64x+ Cycle Accurate Simulator.

    What is the difference between the two? If I want to determine processor load for the test functions, which simulator will be the most accurate to the actual hardware? 

    2) Should I be able to use the projects in the ./examples/sim64xx and ./tutorial/sim64xx directories to simulate the C64x_ core?

    3) Since an project example does not exist from TI, would it be possible if either one of you can provide me with a "HelloWorld" DSP/BIOS project for the C64x+ core for the Mistral dev kit?

     

     

     

     

  • FYI, I believe there are limitations with cycle accutate simulator.  If you do a search thru CCS help pages, you should be able to find some more information. 

  • 1. The CPU simulator is just the CPU itself, it does not take into account any caching, the C64x+ Cycle Accurate Simulator allows for a configurable simulated cache. How accurate these are to real hardware really depends on the size of your code and data, if everything can fit in internal memory/cache they should be right on, but if your code is large or accessing slow external memory a lot you could end up seeing hardware go much slower than the simulator.

    2. The example projects should certainly be a good place to start, they should be buildable and loadable to the simulator out of the box, note that you would want to have CCS setup with a C64x simulator instead of a C64x+ simulator for those tests or you might get some errors/warnings upon trying to load them.

    3. Though there is not an example specific to the OMAP3 that I know of, you may want to try one of the existing C64x+ based examples, I would imagine that C:\CCStudio_v3.3\bios_5_31_08\packages\ti\bios\examples\basic\hello\evmDM6446 will load and run on the DSP of the OMAP3530 with a minor modification of the memory map in your BIOS configuration file, you just have to adjust the inernal memory space (IRAM) to be starting at 0x5C7F8000 running 32k to map to the C64x+ L2 RAM on the OMAP (DM6446 has it at another address). If you have trouble with this please let me know.

  • I've loaded the hello .pjt into the C64xp CCS and changed the IRAM base value to be 0x5C7F8000 and length of 0x8000. I am using the Mistral_Omap35xx_CortexA8.gel for the ARM and the sdomap35xx_C64plux.gel for the C64xp. The pjt builds without errors but when I load the .out file, I get an error below:

     

    "Loader: One or more sections of your program falls into a memory region that is not writable.  These regions will not actually be written to the target.  Check your linker configuration and/or memory map."


    What is happening?

    The omap3530 datasheet say that the L2 RAM starting address is at 0x107F8000. I tried this address as well and got the same error. What do I need do to make the .pjt run?

     

     

     

  • That error message means CCS believes that your .out file is trying to put code or data in a location that is not flagged as valid memory. This could mean either that the memory mapping being enabled (probably by the gel file) is erroneous, or in fact you have some section as defined in your BIOS configuration that is trying to be loaded into memory that is not usable.

    To start with this error you may want to try disabling memory mapping, there should be a 'memory map...' option under the option menu of CCS, in here there should be a check box to disable memory mapping. What this will do is tell CCS that you do not want it to try to screen where you load things, so this will have one of two effects, first it could allow you to load and run your program properly (in which case the memory map was probably wrong), in the second case it could change the error message to something about being unable to verify that the data was loaded (in which case we need to take a closer look at your BIOS configuration file and possibly the .map file generated by your build).

  • Along the lines of what Bernie is saying, if the C64x+ CCS is pulling in c:\CCStudio_v3.3\boards\omap35xx_3430\gel\sdomap35xx_C64plus.gel, then the above addresses will be blocked by CCS itself and not even make it to the target.

    That GEL file specifies a Memory Map to CCS (used often to model devices for the simulator for valid address ranges) in the setup_memory_map() function which is called on Startup.

    In the GEL file, the L2 RAM is defined at 0x007F8000, which is also defined in the TRM as well.  In Section 2.4.5, it illustrates the DSP's view into the IVA Subsystem.

  • Just as a follow up on this, I downloaded the latest BIOS 5.33.03 and though it still has no examples for OMAP3, it does have an OMAP3EVM platform. So for a simple hello world example you can modify one of the existing examples to work with the C64x+ on the OMAP3. You should be able to open up one of the hello examples such as C:\CCStudio_v3.3\bios_5_33_03\packages\ti\bios\examples\basic\hello\evmDM6446 and modify the TCF file it uses to work on the OMAP3, this can be done by opening the TCF file in a text editor and finding the line that has utils.loadPlatform("ti.platforms.evmdm6446"); and changing it to utils.loadPlatform("ti.platforms.evm3530");.

    The primary difference that you have to deal with is the memory mapping; the examples generally use internal memory which is at a different location for each device, in the case of the OMAP3 there is a L2 RAM at 0x1C7F8000 of 96k (assuming L2 cache is disabled) which you can use as IRAM, changing the platform file that the TCF is using as shown above will change this memory mapping for you which can be seen if you examine the TCF file in the GUI after changing the platform value.