Hello,
I'm looking for information on how the synchronization of power management between ARM (Linux) and DSP (DSP/BIOS) works. Meaning, by changing the common resources in one processor what will happen with the other. The common resources I'm talking about is:
- PLL - bypass
- DDR self - refresh mode
- DVFS
- hook function into BIOS PWRM module
- PWM TI templates for target deployment
