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How to design the Data communication path and Message communication path in my system?

steve zhang
Expert 1690 points
Other Parts Discussed in Thread: TCI6638K2K

Hi  all:

I want to design a transcode(first decode then encode) system using some pieces of tci6638k2k.The target system firstly decode the input_1080p mpeg2 bitstream into the output_yuv data.Then the yuv data was devided into three ways and  sent three different destinations.
The first way ,yuv data 1080p was encoded into 1080p H.264 bitstream.The second way,yuv data 1080p was scaled down to 720p and then encoded into 720p H.264 bitstream.The third way ,yuv data 1080p was scaled down to CIF 352x288 and then encoded into CIF H.264 bitstream.

The figure describle the transcode system.In order to simplify I just paint one way 1080p mpeg2 decoded and H.264 encoded.

Device include one piece of tci6638k2k and DDR.
DeviceA is responsible for decoding.
DeviceB is responsible for encoding.
Message:  used to communicate with each other.
Data Sequence:
1080p mpeg2 -> DeviceA -> 1080p YUV data -> DeviceB -> 1080p H.264

.

Please note some points:
 
1.
About decoder performance.
 From the mpeg2 decoder datasheet from C66x_mpeg2vdec_02_02_01_08_ELF,We know that decoding one way 1080p mpeg2 bitstream mostly need 600MHZ.Considered that the frequency of  every DSP corepac in the tci6638K2K is about 1.2GHZ.So decoding one way 1080p mpeg2 bitstream only need half DSP corepac.That means one piece of tci6638k2k with 8 dsp corepac was powerful enough to decode one way 1080p mpeg2 bitstream.
 
2.
Also about performance of H.264 encoder.My aim was to encode one way 1080p H.264 with B frame.
From the H.264 encoder datasheet from 100.V.H264HP.E.C6678.01.00.01.03_v1.We know that encoding one way 1080p H.264 with B frame probably need 7360MHZ(the worst situation).Considered the frequency of Per DSP corepac in the tci6638k2k  is about  1.2GHZ.It means that encoding one way 1080p H.264 need 7-8 pieces of DSP corepac.
     Obviously,if considering the decoding and encoding one way 1080p from mpeg2 to H.264 bitstream,only one piece of tci6638k2k is not enough.I t need two pieces of tci6638k2k to decode and encode one way 1080p.Also in order to simplify,I used DeviceA(one piece tci6638k2k) to deal with one way 1080p mpeg2 decoder,and used the other DeviceB (the other piece tci6638k2k) to deal with one way 1080p H.264 encoder.
 
 
So question comes:
 
1.
About message sending and recieving.
 
 
How to send and receive message between Devices(from one piece of tci6638k2k to the other piece of tci6638k2k)?
How to share message between Devices? The message must be placed in the shared memory space which DeviceA can access and DeviceB can be access too.
How to share message? I just know share message on the same device (tci6638k2k) using shared DDR memory.But outside the tci6638 ,How to share?
 
2.
About data sending and receiving
Similarly, How to share input data and output data?
When DeviceA finish to decode one way 1080p mpeg2 bitstream.the output yuv data must be sent to DeviceB to do encoding task.So the problem is Where the output yuv data is placed. The yuv data must be placed in the share region where the DeviceA who aim to decoding can access and DeviceB who aim to encoding also can access.
 
How to share input and output data between Devices ? between one tci6638k2k and the other tci6638k2k?
 
 
All in all, one important thing is how to transmit message between devices,the other important thing is how to transmit data between devices.



  • 0
    TI__Intellectual 1870 points

    Hi,

    tci6638k2k has several high speed peripherals such as SRIO and Hyperlink.  You can connect two tci6638k2k  devices through these high speed interfaces.

    TI MCSDK has an software called IPC.  It supports sending messages among threads within a tci6638k2k or between two tci6638k2k devices when they are connected through SRIO.

    You can choose to send data through Hyperlink.  Through Hyperlink, on one tci6638k2k, you can see the memory space on the other tci6638k2k.  You can configure EDMA to transfer data between two tci6638k2k devices.

    Xiaohui

  • 0 in reply to Xiaohui Li
    Expert 2430 points

    I would advice caution when using the IPC Srio transport, as it seems quite broken at least on C6678 (spontaneous failures, limitation of max two active cores per chip, ...)

    regards

  • 0 in reply to Clemens Eisserer
    Expert 1630 points

    Clemens Eisserer said:

    I would advice caution when using the IPC Srio transport, as it seems quite broken at least on C6678 (spontaneous failures, limitation of max two active cores per chip, ...)

    This is very concerning to me .... I am currently choosing between SRIO & PCIe & HyperLink for my device-to-device communications.

    TI:  Is there a valid issue/bug/limitation with IPC SRIO?  Should I use one of the other communication technologies instead?

  • 0 in reply to Clemens Eisserer
    Expert 1690 points

    hi,Eisserer:

    Did you mean that SRIO interfaces have bugs when using?

    Did you have make some testing cases to prove what you said about bugs?

    I also was making a choice between Hyperlink or SRIO ,I preferred to SRIO,Because 

    tci6638 had 4 SRIO interface,one tci6638 can connect with the other four ones.

    But with hyperlink,just two can be connected.

  • 0 in reply to steve zhang
    Expert 2430 points

    The IPC SRIO Transport which was recommended has outstanding bugs, the SRIO interfaces are fine of course.

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/295667/1045888.aspx#1045888
    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/284083/1043831.aspx#1043831


    I also was making a choice between Hyperlink or SRIO ,I preferred to SRIO,Because 
    tci6638 had 4 SRIO interface,one tci6638 can connect with the other four ones.
    But with hyperlink,just two can be connected.


    Often, descisions are more complex than that ;)

    Regards, Clemens