DM8168 smartreflex

Hi,
    We are developing DM8168 based IP camera. It has TPS40400 PMIC chip. We ported EZSDK to our platform, but it dont have TPS40400 PMIC driver, we took same from RDK 3.5. When booted camera, we can see s_hvt and s_svt interrupt getting registered (120/121). When load is increased to CPU (1080P encoding and streaming) then s_svt interrupts are happening, but no s_hvt interrupt. I am wondering how to test SmartReflex/AVS functionality, in what scenario s_hvt interrupt will happen ?

Below is my configuration for Smartreflex from 'src/ti-ezsdk_dm816x-evm_5_05_02_00/board-support/linux-2.6.37-psp04.04.00.01/arch/arm/mach-omap2/devices.c'

/* smartreflex platform data */
#define TI816X_SR_HVT_CNTRL_OFFSET  0x06AC
#define TI816X_SR_SVT_CNTRL_OFFSET  0x06A8
#define TI816X_SR_HVT_ERR2VOLT_GAIN 0xD
#define TI816X_SR_SVT_ERR2VOLT_GAIN 0x12
#define TI816X_SR_HVT_ERR_MIN_LIMIT 0xF6
#define TI816X_SR_SVT_ERR_MIN_LIMIT 0xF8

#ifdef CONFIG_REGULATOR_TPS40400

static struct ti816x_sr_sdata sr_sensor_data[] = {
    {
        .efuse_offs     = TI816X_SR_HVT_CNTRL_OFFSET,
        .e2v_gain       = 0x18,
        .err_weight     = 0x4,
        .err_minlimit   = 0xFA,
        .err_maxlimit   = 0x2,
        .senn_mod       = 0x1,
        .senp_mod       = 0x1,
    },
    {
        .efuse_offs     = TI816X_SR_SVT_CNTRL_OFFSET,
        .e2v_gain       = 0x23,
        .err_weight     = 0x4,
        .err_minlimit   = 0xFC,
        .err_maxlimit   = 0x2,
        .senn_mod       = 0x1,
        .senp_mod       = 0x1,
    },
};

static struct ti816x_sr_platform_data ti816x_sr_pdata = {
    .vd_name                = "vdd_avs",
    .ip_type                = 2,
    .irq_delay              = 200,
    .no_of_vds              = 1,
    .no_of_sens             = ARRAY_SIZE(sr_sensor_data),
    .vstep_size_uv          = 7812,
    .enable_on_init         = true,
    .sr_sdata               = sr_sensor_data,
};