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C6678 interrupts

I have some doubt for the configuration of the C6678 interrupts.

1)The interrupt service table (IST) is shared from the 8 core? Or every core should have his own IST?

2)EDMA3 and Hyperlink receive interrupts from CIC2 and CIC2. So these pheripherals should have their own IST?

  • Hi Gabriele,

    Every core has his own interrupt service table, The EDMA3 and the Hyperlink can get system events for activation so you can set the EDMA to start working on one of the events this is not connected to the core interrupt,

    Thanks,

    HR

  • Ok. And just one more question

    How can i map the "CorePac Primary Interrupts" and the "Host Interrupt" coming from CIC to the 12 System Interrupt aviable in my DSP?
    With the CIC i can only map incoming interrupts to internal channel

    I've worked for another project with the C6455 ind i had the INTMUX registers for mapping events to system interrupt... But in the c6678 i haven't found any corresponding register...

  • Hi Gabriele,

    Please check - http://processors.wiki.ti.com/index.php/Configuring_Interrupts_on_Keystone_Devices

    Thanks,

    HR