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Desired: Help learning device-to-device communication

Chris Jagielski
Expert 1630 points

Howdy all,

I am inquiring: Given that I know the start & end memory addresses of my data, I want to pass small (1 UInt32) and medium (~10kBytes) data sets from one C6678 device to another C6678 device.  Transfer speed is a non-issue.  For example:

  1. DSP #1 CORE0 has a value stored at 0x80ffff00 (DDR3)
  2. That value gets passed to DSP #2 CORE0, sent to 0x80ab1234 (DDR3)

What is the easiest way (i.e. simplest to implement in code) to accomplish this?  I have limited time to add the device-to-device code to my existing multicore projects, so I'm brainstorming.

My hardware:

  • Advantech's 8681
    • 4x C6678 (Shannon) DSPs, each with 8 Cores
    • DSP Hardware connections on 8681:
      • PCIe
      • SRIO
      • HyperLink

My constraints:

  • NO speed constraints :)
  • Max data size to transfer "at once" is approx 10kBytes
  • Minimal software overhead
  • Software is easy (relatively) to learn

I've never programmed device-to-device before, and I have limited time to complete my code.  I'm hoping to learn here!

Since I already have PCIe communication working between my 8681 and my host (Linux) PC, at worst I could use the PC as a middle-man and transfer from DSP0 -> Linux PC -> DSP1.  This is wasteful, of course, but at a minimum I know I could get it to work :)

Thank you

  • 0
    Mastermind 6325 points

    Chris,

    I would say using SRIO and the direct IO messages sounds promising.  The direct IO messages, you would write directly to the address in the other DSP.  This would be especially easy if the Shannon board is directly connected SRIO and not even through a switch.  If its through a switch, you would need to make sure the routing table is set up etc.

    In the PDK there is a SRIOLoopbackDIOISR example.  It uses the SRIO driver that TI already wrote.  But you could also, just familiarize yourself with the SRIO registers and use the CSL calls directly to the LSU registers.  I chose to integrate TI's drivers.  The hardest part was getting it to work with SRIO and NDK at the same time because the example projects were using the same Interrupt and rx buffers from the packet accelerator.

    Knowing what I know now, I probably would take TI's srio init routine from the example programs and then use the LSU registers myself instead of thru the driver.  Especially if you do not care about speed so much, then you can just loop while waiting for the physical layers to acknowledge your packets instead of an ISR and the packet accelerator.

    Just my two cents :)

     

    Good luck!

    Brandy

     

     

  • 0 in reply to Brandy Jabkiewicz
    Expert 1630 points

    Thanks for your input Brandy!


    As it turns out, half of my application won't need intra-device communications, and the other half is approaching a deadline so soon that I don't have the time to adequately learn about the SRIO registers.

    So I've decided to use some hard-coded DDR for my "ipc".... I have a set memory map where my variables go, I've invalidated all cache of the DDR, and I just have to be mindful with timing to avoid writing to the same address with >1 cores.  It's not elegant but it works so far, I'm really looking forward to the opportunity to make this code much more robust and secure.