Wanted page mode read timing diagram

I am presently working on interface between DSP TMS320C6671 Processor and the NOR flash (JS28F064M29EWXX). I am performing timing analysis between processor and flash in PAGE Read Mode. The TMS320C6671 manual provides timing diagram only for asynchronous normal read operation. We need timing diagram for the processor in PAGE Read Mode, also details on how does the CE and OE signals perform during PAGE Read Mode, what are their timing constraints in PAGE Read Mode. Please provide the info about these or timing diagram for Page Read Mode.