Hi, TIers
I'm using DM8168, with RDK 3.0.
There is one HDCOMP(can be configured as VGA or YPbPr) output in my usecase, Currently be configured as YPbPr, with embedded sync signals, but HSync signal with 33.75KHz frequency still can be detected on pin VOut1_HSYNC when register 48140724 be setted as 0x00(disable sync signals output), while I set register 48140724 as 0x06(enable sync signals output), VSync and HSync work properly , e.g. 720P60(vsync = 60Hz, hsync = 45KHz), 1080P60(vsync = 60Hz, hsync = 67.5KHz).
I want to know how the 33.75KHz HSync generated, and what does it effect?
Appreciate for any reply!