Hi,Rex:
Several days ago,We discussed about the mpmsrv and memory map of tci6638k2k at this post:
http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/300548/1053867.aspx#1053867
Inside that post,you said that because of DDR3 bus width issues only 1GB memory space of DDR3A
2GB DIMM could be accessed by DSP and ARM.
But today I try to access the address range more than 1GB such as from 0xc000 0000 to 0xFFFF FFFF
via mmap on ARM side.The result is ok and no problem.
Why? As you said before however DSP and ARM just could access only 1GB memory space from
0x8000 0000 to 0xBFFF FFFF because of the bus width issues.Why now I can access the address range
other than 1GB from 0xc000 0000 to 0xFFFF FFFF?
My test application is like this:
ARM side:
I access the address 0xC000 0000 via mmap and then write 1KB data to that address.
DSP side:
I open CCS and view memory from the address 0xC000 0000 .And the value I read from the
0xC000 0000 in CCS from DSP side is just the right one I write into the 0xC000 0000 from ARM
side.
Then I try other addresses such as 0xd000 0000 ,0xE000 00000 and 0xf000 0000.These addressed
can be accessed anyhow from DSP side and ARM side.
So,Why? Is there something wrong with that? what's wrong?Where make mistakes?
