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DSP's high load affected M3 codec's h.264 bit generate.Why?

SuitJune Young
Genius 3985 points

Hell,TI sir.

in our board,we use DSP to perform audio echo cancel.However,for a mass data progressing,DSP's load is high.And If we enable the aec with DSP,the M3 codec will not generate h.264 stream.

We have experienced the similar things many times.One core(a8/dsp/m3 codec/m3 video)'s high load will affect another core's operation,the "victim" is m3 codec or video most of time.

I think,for DM8168,there is only one DDR controller,so in 8168 only one core can run most of time.Or else the core can only run with the data in cache and cache is little compared to Audio/Video data.

In dm8168,every core need to balance its load for a safe run?

  • 0
    TI__Guru 59700 points

    816x has two EMIFs with interleaving enabled and is capable of serving 12 GBps theoretical bandwidth when DDR3 is operated at 796 Mhz.. 816x also provides several controls to set priority of different initators like M3/c674 dsp at the DDR based on which DDR requests will be prioritized.Although it is possible that meomentary burst acces from one initiator can degrade performance of another intiator like encoder it is unlikely .

    It is not clear what the issue you are seeing is. Are you seeing momentary frame drops in encoder or do you see encoder stopping permanentl. If encoder stops permanently then it is not an issue with c674 load. It is some other issue.

  • 0 in reply to Badri Narayanan
    Genius 3985 points

    Thanks,I will have a try.