Frequency mismatch error

Hi Balwant,

I want to give a little background about the frequency mismatch error before I answer your questions:

The DMTimer startup code that runs before main validates the DMTimer frequency using the TimestampProvider module. If the timestamps indicate that the programmed DMTimer frequency is incorrect, it raises an error.

Now there could be one of 2 problems here. Either the CPU frequency is incorrect which is causing the timestamp check to fail or the DMTimer frequency itself is incorrectly programmed.

You can determine the CPU frequency from ROV's BIOS view and compare it to the frequency the gel files are programming the core to run at.

Similarly, you will need to check if the gel files are programming the DMTimers to run at a different frequency (not 32KHz) i.e. the DMTimers are connected to a higher frequency clock source. If yes, then you can override the default DMTimer frequency to match the right frequency using the following code:

var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');
Timer.intFreq.lo = xxxxxxx;
Timer.intFreq.hi = 0;

From the error message you get, I think it is more likely that the DMTimer is connected to a higher frequency clock.

Best,

Ashish

Hello Ashish,

Thanks for your response. I checked for CPU clock freq in ROV. It is showing 550Mhz CPUFreqLow (default...as I have not changed it). However I could not found out the exact configuration for DMTimer. Below is the gel file execution details I can see in the console window. I am using the standard ICE gel file TMDXICE3359.gel

Also, you suggested to change the DMTimer module frequency. In which file this code for changing the freq. needs to be added? In config.cfg file? Or something else?

CortxA8: Output: **** AM3359_ICE Initialization is in progress ..........

CortxA8: Output: **** AM335x ALL PLL Config for OPP == OPP100 is in progress .........

CortxA8: Output: Input Clock Read from SYSBOOT[15:14]: 24MHz

CortxA8: Output: **** Going to Bypass...

CortxA8: Output: **** Bypassed, changing values...

CortxA8: Output: **** Locking ARM PLL

CortxA8: Output: **** Core Bypassed

CortxA8: Output: **** Now locking Core...

CortxA8: Output: **** Core locked

CortxA8: Output: **** DDR DPLL Bypassed

CortxA8: Output: **** DDR DPLL Locked

CortxA8: Output: **** PER DPLL Bypassed

CortxA8: Output: **** PER DPLL Locked

CortxA8: Output: **** DISP PLL Config is in progress ..........

CortxA8: Output: **** DISP PLL Config is DONE ..........

CortxA8: Output: **** AM335x ALL ADPLL Config for OPP == OPP100 is Done .........

CortxA8: Output: **** AM335x DDR2 EMIF and PHY configuration is in progress...

CortxA8: Output: EMIF PRCM is in progress .......

CortxA8: Output: EMIF PRCM Done

CortxA8: Output: DDR PHY Configuration in progress

CortxA8: Output: Waiting for VTP Ready .......

CortxA8: Output: VTP is Ready!

CortxA8: Output: DDR PHY CMD0 Register configuration is in progress .......

CortxA8: Output: DDR PHY CMD1 Register configuration is in progress .......

CortxA8: Output: DDR PHY CMD2 Register configuration is in progress .......

CortxA8: Output: DDR PHY DATA0 Register configuration is in progress .......

CortxA8: Output: DDR PHY DATA1 Register configuration is in progress .......

CortxA8: Output: Setting IO control registers.......

CortxA8: Output: EMIF Timing register configuration is in progress .......

CortxA8: Output: EMIF Timing register configuration is done .......

CortxA8: Output: DDR PHY Configuration done

CortxA8: Output: **** AM3359_ICE Initialization is Done ******************

As I mentioned earlier, this error I get sometime. Also, I am receiving some data and responding that data over serial (UART5). Sometimes I get a communication error (not receiving the data on ICE board). So, I just wanted to correlate if this problem of freq mismatch is related to that issue as well.

Thanks & Regards

-Balwant

Balwant,

Can you share the gel file you are using ? The console log you posted does not have enough info to determine the frequency.

Best,

Ashish

Hi Ashish,

Please find attached gel file that I am using.

Thanks & Regards

-Balwant

Hi Balwant,

I reviewed the gel file you shared but could not find any Timer Clock enable code. I am guessing either your app is enabling the timers or if you are using a bootloader, it is doing it.

Coming to the question of Timer frequencies. I dont see any code selecting the timer clocks either.

You can determine the Timer clock that is being selected by looking at the following registers:

Timer2 - 0x44E00508

Timer3 - 0x44E0050C

Timer4 - 0x44E00510

Timer5 - 0x44E00518

Timer6 - 0x44E0051C

Timer7 - 0x44E00504

(DMTimer module supports timer 2-7)

If the register reads 0x1 then the timer is connected to the 24MHz clock and if it reads 0x2 it is using 32KHz clock. The default value of the register is 0x1 implying the timers are connected to 24MHz clock. I am guessing that since the gel script is not configuring these registers, they have the default value of 0x1.

Once you confirm the timer clock rate is 24MHz, add the following code to your *.cfg file and everything should work:

var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');
Timer.intFreq.lo = 24000000;
Timer.intFreq.hi = 0;

Best,

Ashish

Hi Ashish,

I checked for Timer2 value (which I suppose is used for DMTimer in ICE). The register window shows the value as 0x02 and not 0x01(defalut). I am attaching snap shot for CCS.

Please let me know how to change this to 24MHz or I can configure the timer in *.cfg file to 32K?

Thanks & Regards

-Balwant

Hi Balwant,

The dmtimer module has the timer frequencies set as 32KHz by default and that is the reason you were getting the frequency mismatch error. The dmtimer module timer frequencies did not match the actual timer frequency which is ~26MHz according to the timer module frequency check logic.

Can you confirm which timer Ids are being used from the ROV->Timer view when you get the frequency mismatch error ? I wonder if different timers are configured to use different clocks. That would explain the problem.

Please share the basic, device and module view of the timer.

Best,

Ashish

Hi Ashish,

I tried to check for getting the snap shot using the ROV. But unfortunitely, I could observe the error today. However, in my yesterday's snap shot, the ROV view is there. There we can see that DMTimer2 is used.

Can you please let me know how I can set the Timer frequency lets say either for 32KHz or 24Mhz in my application? Should I try and write it in *.cfg file?

In case I get the error on monday, I would put the snap of it.

Thanks & Regards

-Balwant

Hello Ashish,

UI tried to add the code for 32KHz in *.cfg file.

var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');
Timer.intFreq.lo = 32768;
Timer.intFreq.hi = 0;

But still it is giving the error. I don't see the ROV since the code is not getting loaded. but when the code gets loaded properly, it shows that DMTimer2 is used. The timer value set for Timer2 is 0x02 (not the default 0x01)

Please let me how I can make it to oxo1? I need to fix this issue ASAP as many thing are depenent on this frequecy setting. Also, please let me know the india local support reference details so that in case needed I can get in touch with him.

Thanks & Regards

-Balwant

I believe the problem is that the timer is actually being clocked at 24 MHz but SYS/BIOS thinks that it is clocked at 32768 Hz.

To inform SYS/BIOS of the proper frequency, add the following code to your .cfg file:

var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');
Timer.intFreq.lo =24000000;

Alan

Hello Alan, Ashish,

I enetered the code you suggested in the *.cfg file

var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');

Timer.intFreq.lo = 24000000;

Timer.intFreq.hi = 0;

Now I get the following error every time I try to connect the debugger

"

[CortxA8] ti.sysbios.timers.dmtimer.Timer: line 1142: E_freqMismatch: Frequency mismatch: Expected 24000000 Hz, actual: 36047 Hz. You need to modify Timer.intFreq.lo to match the actual frequency.

xdc.runtime.Error.raise: terminating execution"

Am i doing somthing wrong in the cfg file? Please let me know how I can made SYS/BIOS to understand the required frequency.

Please find attached snap shot for error.

Thanks & Regards

-Balwant