We are using OMAP SPI in slave mode, receiving only. Periodically, the master is sending a very large sequence of data which is not interrupted by CS0.
In other words, CS0 goes down, MOSI and CLOCK are going up and down for x thousands of bytes. CS0 goes up and everything repeats. CS0 doesn't go up and down like every 32 bits.
OMAP TRM says:
"In slave mode, the MCSPI initiates data transfer on the data lines (mcspim_simo and mcspim_somi) when it is selected by an active control signal (mcspim_csx) and receives an SPI clock (mcspim_clk) from the external SPI master device. Only channel 0 can be configured as a slave. In slave mode, the MCSPI uses the edge of mcspim_csx to detect word length. For this reason, mcspim_csx must become inactive between each word. The MCSPI does not support mcspim_csx active between SPI words. It uses the edge to detect word length."
Right now, without FIFO, we don't manage to read well data.
Question: what is happening at the MCSPI block level when data continues to arrive especially after 32 bits. Will new data be shifted in the RX buffer on the right side of SYNCHRO, erasing previous data? Or are the current 32 bits passed to the FIFO (de facto, word is 32-bit long) and the RX buffer is filled again with new data?
