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OMAP3530 ARM access DSP L2RAM cause kernel panic

Airie Zhou
Prodigy 140 points

(It's a duplicate for http://e2e.ti.com/support/dsp/omap_applications_processors/f/447/t/306976.aspx in case I posted in the wrong place)

Hi,

I'm using Gumstix Overo board with OMAP3530, currently running Linux 3.5 kernel, source is from https://github.com/gumstix/linux/tree/omap-3.5. I am trying to develop a primitive "DSPLink" for study purpose. It's only functionality would be load DSP binary (the program just write a msg to Mailbox 0) to its memory, and expect to get an interrupt from Mailbox. I'm new to this so I apologize for any silly mistake/questions.

Currently, I set U-boot boot arg mem =224MB (256MB in total). In the device driver, I do ioremap to gain access to the 32MB and other L3 bus address. And I use remap_pfn_range to let user space gain access to this 32MB as well. (not quite related with this forum I guess). 

I use CCS V5 and newest cgt tool to generate hello_world.out . Lind cmd file is set to make _c_int00 entry point to align with 1KB., since BOOTADDR requires that. BOOTMOD is set to 0.

And then I found a DSP boot assist tool which can turn this .out to a boot table. I get the bootTable.h file and write it into starting address of DSP L2RAM (extract each section header and write it into L2 RAM). And once I load a program to let DSP write a value to its L1 RAM. 

I believe there was some address error and/or other illegal memory operation. Because before I load module and reset,release  DSP, I can use devmem2 (a handy tool to check register values) to read/write DSP L2RAM from Linux. But after I insmod my module, the kernel hangs. And even after reboot, I cannot use devmem2 to access DSP L2RAM anymore. Kernel always panic showing "Kernel Panic - Not syncing: fatal exception in interrupt" and hangs.

And another question I have is that, if DSP MMU is disabled, can DSP access external RAM according to the global mapping? In the reference manual, it only says it can access its L1,L2 and some internal places.

To sum up, my question is 

1. What can I do to gain access to DSP internal RAM from Linux again? Currently every read/write gives me kernel panic. What might be the reason?

2. DSP MMU if disabled, can DSP access external RAM and L3 bus addresses ? If I want DSP to write to mailbox 0, do I have to enable IVA2.2 MMU?

3.please point out any mistake that I have. 

Thanks a lot.