• State Resolved
  • Locked Locked
  • Replies 16 replies
  • Subscribers 98 subscribers
  • Views 1441 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PCI on DM8148 EVM

Dennis McLeod
Intellectual 925 points

I am unable to get PCI working (in RC mode) on the DM8148 EVM.  The kernel that came with PSP04.04.00.01 did not even have CONFIG_PCI enabled.  I have enabled it, and have followed the "Supported Use Case" section (19.3) of the TRM (sprugz7b).  The PCIE_PLLCFG regs are set, the PCIE_CFG.PCIE_DEVTYPE is 2. I enabled the TRSSM_EN bit in CMD_STATUS.  I put a prink in pcie-ti81xx.c in the check_device() function that prints the value of PCIE DEBUG0 register. As it enumerates PCI, this function is called on each device. Here's the first few printouts: 

ti81xx_pcie: Reading config[0] for device 0000:00:00..check_device(): DEBUG0 is b503, LTSSM_STATE_MASK is 1f
failed. No link/device.
ti81xx_pcie: Reading config[0] for device 0000:01:00..check_device(): DEBUG0 is b503, LTSSM_STATE_MASK is 1f
failed. No link/device.
ti81xx_pcie: Reading config[0] for device 0000:02:00..check_device(): DEBUG0 is bc43, LTSSM_STATE_MASK is 1f
failed. No link/device.
ti81xx_pcie: Reading config[0] for device 0000:03:00..check_device(): DEBUG0 is bc43, LTSSM_STATE_MASK is 1f
failed. No link/device.
ti81xx_pcie: Reading config[0] for device 0000:04:00..check_device(): DEBUG0 is bc43, LTSSM_STATE_MASK is 1f
failed. No link/device.

So the DEBUG0.LTSMM_STATE is 3, in all cases. That corresponds to state POLL_COMPLIANCE state rather than the expected L0 state (0x11). 

How do i debug this?  

Shouldn't the PCIESS show up in the "lspci -v" output as bus0?

Does there need to be an EP available for the root to show up in lspci? 

Please help!

  • 0
    TI__Guru**** 170625 points

    Hi Dennis,

    Dennis McLeod said:
    I am unable to get PCI working (in RC mode) on the DM8148 EVM.

    Are you following the PCIe RC user guide?

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_PCI_Express_Root_Complex_Driver_User_Guide

    Dennis McLeod said:
    The kernel that came with PSP04.04.00.01 did not even have CONFIG_PCI enabled.

    I checked the ti8148_evm_defconfig, and it has CONFIG_PCI enabled:

    ti-ezsdk_dm814x-evm_5_05_02_00/board-support/linux-2.6.37-psp04.04.00.01/arch/arm/configs/ti8148_evm_defconfig

    #
    # Bus support
    #
    CONFIG_PCI=y
    CONFIG_PCI_SYSCALL=y
    CONFIG_ARCH_SUPPORTS_MSI=y
    CONFIG_PCI_MSI=y
    # CONFIG_PCI_DEBUG is not set
    # CONFIG_PCI_STUB is not set
    # CONFIG_PCI_IOV is not set
    # CONFIG_PCCARD is not set

    • For TI814X
     $ make CROSS_COMPILE=arm-none-linux-gnueabi- ARCH=arm ti8148_evm_defconfig

    Regards,
    Pavel

  • 0 in reply to Pavel Botev
    Intellectual 925 points

    Hi Pavel, 

    Thanks for your reply. Yes, I have been following along with a guide but it was not the one you suggested. I have been reading/following  this guide: 

    http://processors.wiki.ti.com/index.php/DM81xx_AM38xx_PCI_Express_Root_Complex_Driver_User_Guide

    I must have PCI enabled in the kernel, as I am getting my debug printk's from the pcie driver code during bootup. I am certain that the PLLs are up, because they ultimately drive the PLLs for sata and for ethernet.. both of which are working. 

    Can you suggest any other places to look, register dumps, etc that might help figure out what is going wrong? 

    Assuming I have NO pci endpoint plugged into the slot, should "lspci -v"  still show me the root bus? The PCIESS? 

  • 0 in reply to Pavel Botev
    Intellectual 925 points

    Pavel Botev said:

    I checked the ti8148_evm_defconfig, and it has CONFIG_PCI enabled:

    Yes, CONFIG_PCI is enabled in ti814x_evm_defconfig, but it was not enabled in the kernel that was on the SD card that came with the EVM.  I can verify this by inspecting "ls /sys/bus/platform/devices".  There is no entry for ti81xx_pcie.0.   If I build a new kernel with pci enabled as directed in the user guide you mentioned, then I can see ti81xx_pcie.0 in the /sys/bus/platform/devices.  But, no devices are enumerated. Not even the root bus.  I did try plugging two different devices into the pci slot on the bottom of the EVM, neither of them were detected. Whether or not the kernel had drivers for those devices, they should still have shown up in /sys/bus/pci/devices/.  They did not. 

    Please let me know if there are any registers I can inspect, or things to check. Any ideas are welcome. 

    Thank you

  • 0 in reply to Pavel Botev
    Intellectual 925 points

    In the PCIE_CFG register, the manual says the PCIEDEVTYPE "should be valid before releasing reset to PCIESS."

    Also, in section 19.3.1.1.1 "Initialization sequence of PCIe Root Complex" it says "Bring PCIESS out of reset through the device level reset controller." 

    Where is there a reset for PCIESS ???   I have not found anywhere that says how to bring the entire PCIESS in or out of reset. 

  • 0 in reply to Dennis McLeod
    TI__Guru**** 170625 points

    Dennis,

    Dennis McLeod said:
    Where is there a reset for PCIESS ???   I have not found anywhere that says how to bring the entire PCIESS in or out of reset

    In DM814x datasheet, section 7.3 Reset, we have the following DM814x device reset sources: Power-On Reset, External warm reset, Emulation warm reset, Watchdog reset, Software global cold reset, Software global warm reset and Test Reset.

    In subsection 7.3.12 PCIE Reset Isolation we have: All device level resets mentioned in the previous sections, except Test Reset, will also reset the PCIE Subsystem.

    You can check also DM814x TRM, section 2.7.13.1 PCIe Reset Isolation

    These are the DM814x device level reset signals, controlled through the device PRCM and its registers.

    The PCIe module local reset is controlled through the PCIe registers (RSTCMD, PL_LINK_CTRL).

    Regards,
    Pavel

  • 0 in reply to Pavel Botev
    Intellectual 925 points

    Thank you Pavel. I have seen those sections, but will review them again. I guess I was looking for a master reset for the PCIESS from the PCRM. Mainly just so that I could determine that the PCIESS was not being held in reset.

    I am carefully reviewing the registers in the PCIESS. I am certain the PLLs are working as I can step through ti81xx_pcie_pllcfg() in devices.c and the PLL lock status bit is set.

    ti814x_pcie_pllcfg[2555]: PCIE_PLLSTATUS = 0x00e8cd

    A short while later, in pcie_ti81xx.c function ti81xx_pcie_scan(), I printed out the values of some PCIESS registers:

    RSTCMD : 00010000
    PMCMD : 00000000
    PMCFG : 00000000
    ACT_STATUS : 00000000
    SERDES_STATUS : 03385048
    SERDES_RXCFG0 : 008c8480
    SERDES_RXCFG1 : 008e0500
    SERDES_RXCFG2 : 7bdef000
    SERDES_RXCFG3 : 1f180bff
    SERDES_RXCFG4 : 00000000
    SERDES_TXCFG0 : 0101f600
    SERDES_TXCFG1 : 40000002
    SERDES_TXCFG2 : 00000000
    SERDES_TXCFG3 : 073ce39e
    SERDES_TXCFG4 : 01000000

    The register description of SERDES_STATUS is not detailed in the TRM (section 19.5.1.61). So I have no idea what that value means.

    Any help at all in getting this figured out is greatly appreciated!

  • 0 in reply to Dennis McLeod
    Intellectual 925 points

    Also, anyone out there with a DM8148 EVM.. could you please let me know if "lspci -v" shows you the root bus? Even if there are no PCIE devices plugged into the slot? 

  • 0 in reply to Dennis McLeod
    TI__Guru**** 170625 points

    Dennis,

    As you stated that you are using PSP04.04.00.01, other thing I can recommend you is to apply all PCIe related patches above this version of the PSP:

    1. u-boot

    http://arago-project.org/git/projects/u-boot-omap3.git?p=projects/u-boot-omap3.git;a=shortlog;h=refs/heads/ti81xx-master

    http://arago-project.org/git/projects/u-boot-omap3.git?p=projects/u-boot-omap3.git;a=shortlog;h=refs/heads/TI81XXPSP_04.04.00.01

    PSP04.04.00.01 is tagged with v2010.06_TI81XXPSP_04.04.00.01, and we have several patches in the ti81xx-master branch above this tag. Similar with the linux kernel.

     2. linux kernel

    http://arago-project.org/git/projects/linux-omap3.git?p=projects/linux-omap3.git;a=shortlog;h=refs/heads/ti81xx-master

    http://arago-project.org/git/projects/linux-omap3.git?p=projects/linux-omap3.git;a=shortlog;h=refs/heads/TI81XXPSP_04.04.00.01

    Regards,
    Pavel

  • 0 in reply to Pavel Botev
    TI__Guru**** 170625 points

    I can also provide you the below links, please have a look, might be in help:

    http://processors.wiki.ti.com/index.php/TI81XX_PCIe_FAQs

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/p/163305/600147.aspx

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/154734.aspx

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/137123.aspx

    Regards,
    Pavel

  • 0 in reply to Pavel Botev
    Intellectual 925 points

    Hi Pavel, 

    I will continue looking through the patches you mentioned and will report back. 

    On this thread, http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/p/163305/600147.aspx, Shilpa describes the same problem I am having. Hermant suggested checking that SW5-1 is set to "off".   On my DM8148 EVM, SW5 is a pushbutton labeled "PMIC RST".    What did he mean? 

    Thank you again!

  • 0 in reply to Dennis McLeod
    TI__Guru**** 170625 points

    Dennis,

    Dennis McLeod said:
    DM8148 EVM.. could you please let me know if "lspci -v" shows you the root bus? Even if there are no PCIE devices plugged into the slot?

    I have tried this on my DM8148 EVM (without attaching any PCIe devcie in the slot), but I do not have the "lspci" tool enable by default:

    root@dm814x-evm:~# lspci -v
    -sh: lspci: not found

    Also, I checked the /sys/bus/pci/device/ folder, but nothing listed there:

    root@dm814x-evm:/sys/bus/pci/devices# ls -al
    drwxr-xr-x    2 root     root            0 Jan  1  2000 .
    drwxr-xr-x    5 root     root            0 Jan  1  2000 ..

    How did you enable the "lspci -v" in your DM8148 board?

    I have the below messages, when I boot up the DM8148 EVM (with no PCIe device attached), and enable PCI Debugging from menuconfig:

    ti81xx_pcie: Invoking PCI BIOS...
    ti81xx_pcie: Setting up Host Controller...
    ti81xx_pcie: Register base mapped @0xd7020000
    ti81xx_pcie: Setting outbound translation for 0x20000000-0x2fffffff
    ti81xx_pcie: Starting PCI scan...
    PM: Adding info for No Bus:pci0000:00
    PM: Adding info for No Bus:0000:00
    pci_bus 0000:00: scanning bus
    ti81xx_pcie: Reading config[0] for device 0000:00:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:01:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:02:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:03:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:04:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:05:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:06:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:07:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:08:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:09:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:0a:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:0b:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:0c:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:0d:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:0e:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:0f:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:10:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:11:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:12:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:13:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:14:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:15:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:16:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:17:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:18:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:19:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:1a:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:1b:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:1c:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:1d:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:1e:00..
    failed. No link/device.
    ti81xx_pcie: Reading config[0] for device 0000:1f:00..
    failed. No link/device.
    pci_bus 0000:00: fixups for bus
    PCI: bus0: Fast back to back transfers enabled
    pci_bus 0000:00: bus scan returning with max=00
    pci_bus 0000:00: resource 0 [mem 0x20000000-0x2fffffff]
    pci_bus 0000:00: resource 1 [io  0x40000000-0x402fffff]

    Best regards,
    Pavel

  • 0 in reply to Dennis McLeod
    TI__Guru**** 170625 points

    Dennis,

    Dennis McLeod said:
    Hermant suggested checking that SW5-1 is set to "off".   On my DM8148 EVM, SW5 is a pushbutton labeled "PMIC RST".    What did he mean?

    I think Hermant means SW5-1 in DM8168 EVM, not DM8148 EVM. See wiki page below:

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_PCI_Express_Root_Complex_Driver_User_Guide#Taking_care_of_PERSTn

    Note: This section including sub-sections do not apply to TI814X/TI813X.

    Note: As per the issue SDOCM00077550 (refer Release Notes), setting this switch as ON (OUTPUT) causes failure to detect the EP connected in the EVM slot since the reset line remains asserted (low). So it is recommended to keep this switch in OFF (INPUT) state. 

    SW5 ---> PCIe RST = OFF ('0')

    Can you try with other PCIe card attached to the DM8148 EVM PCIe slot?

    Also, your issue looks very related to the one described in the wiki page user guide:

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_PCI_Express_Root_Complex_Driver_User_Guide#Endpoint_device_not_detected

    • Once the RC kernel is booted, 'lspci' command doesn't show any device.
    No link/device

    Regards,
    Pave
  • 0 in reply to Pavel Botev
    Intellectual 925 points

    Thank you Pavel! That was helpful! That is almost exactly the output I get also. So the fact that the root bus does not show up when there are not devices under it, is probably normal behavior. 

    I did try plugging two different PCIE cards into the bottom connector on the 8148EVM and neither were listed in /sys/bus/pci/devices. One of the devices was a SoundBlaster sound card, the other was an expansion card for RS232 and DB25 Parallel. I was not expecting to be able to "use" them from the kernel, but I did expect for them to get enumerated. 

    Maybe I should try getting one of the ethernet boards they used in the example?

  • 0 in reply to Dennis McLeod
    TI__Guru**** 170625 points

    Dennis,

    As you are using DM8148 EVM with PSP04.04.00.01 (which has ready-made software for detecting and enumerating the EP device attached), and following the PCIe RC user guide, then most probably the issue is in the EP device. 

    If you can try with the tested EP devices (ethrenet boards) we can thus narrow down the problem.

    Regards,
    Pavel

  • 0 in reply to Pavel Botev
    Intellectual 925 points

    I will order a broadcom ethernet card like the one used in the RC user guide. Maybe only Gen1 x1 devices are supported without modifying the RC driver. 

    I will report back once I get and test the Broadcom card. 

    Thank you again for your help!

  • 0 in reply to Dennis McLeod
    Intellectual 925 points

    I bought the same Broadcom Ethernet card used in the RC user's guide example. It does work on the 8148 EVM. 

    So it appears the PCIESS will only work at all with a Gen1 x1 device.. unless you start modifying things in the kernel. 

    Thank you,  Pavel.