We are using a DM8165 as a pci endpoint booting u-boot from spi flash (spi boot mode).
In order to meet PCI specification, I believe u-boot needs to have the pcie configured within 100ms of reset. Our u-boot image is approx. 50k in size. From the 816x trf, spi boot mode should be using a 12MHz clock which should load the image in ~50ms, but it is actually taking ~100ms.
I have looked at the SPI clk rate used by the boot rom, and it looks like it is ~6.6MHz instead of 12MHz as called out in the TRF.
What should the SPI clock rate be for the boot rom? Is there a way to have a higher clock rate?