Hi,
I'm trying to find out what the duty cycle requirement is for the AUD_CLKIN1 pin on the DM8148. I serached the datasheet and the TRM and could not find any timing information for the AUD_CLKINx pins.
Thanks
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Hi,
I'm trying to find out what the duty cycle requirement is for the AUD_CLKIN1 pin on the DM8148. I serached the datasheet and the TRM and could not find any timing information for the AUD_CLKINx pins.
Thanks
Hi Brad,
Regarding AUD_CLKINx external pins, these can use external oscillator instead of the oscillator inside chip to purse more precise audio clock.
I also have a search in the DM814x documentation, and I can not find any specific duty cycle requirements for the AUD_CLKINx external pins. Thus I assume we do not have any specific requirements and/or restrictions from the DM814x side regarding the AUD_CLKIN1 external pin duty cycle. And you should be aligned with the duty cycle requirements for the other clock pins described in the DM814x datasheet.
I found requirements only regarding the max frequency (30MHz, 50MHz, 192MHz) at OPP100.
I will also double check with the Hardware team, if they have something more to add.
Best regards,
Pavel
To update this thread, based on internal mail communication, the timing requirements of DM814x AUD_CLKINx pins should be the same as the one provided in datasheet for J5Eco/DM811x device. The DM814x datasheet will be updated with this info.
Regards,
Pavel