DSP Memory view of aliased DDR Memory

I have attached the source code that I used for testing the aliasing of the DDR memory

5123.MemoryWriter.tar.gz

I am booting with DDR3A_REMAP_ENABLE=1

Hi,Kjetil :

I agree that by default address range 0x8 0000 0000 can be mapped to 0x8 000 0000 for 2GB.

But I cannot understand what does that mean when you map 0x0 8000 0000 to 0x8000 0000?

Isn't 0x0 8000 0000 and 0x8000 0000 the same address?

why the address oneself can map to itself ?  It's so unbelievable.

Would you tell me the meaning of that ?  Thanks!

Hi Steve,

I might be using the wrong words for describing the memory configuration. When I say that i map 0x8000 0000 to 0x0 8000 0000 I really mean that I setup address translation, so the address 0x8000 0000 is translated to 0x0 8000 0000. When programming the DSP you are only using 32bit addresses however the XMC provides the capability to extend this address to a 36bit address. So the XMC needs to know how to do this translation.

This address translation has to be programmed using the MPAX registers. The adress translation needs to be programmed even for the trivial translations. They need to be programmed even if you just want the 32bit address 0x8000 0000 to be translated to the 36bit address 0x0 8000 0000.

If you take a look at the Section 7.3.1.3 of the C66x CorePac User's Guide you will see that by default the MPAX register contains these address translations.

0x0000 0000 - 0x7fff ffff : Translates to 36bit addresses 0x0 0000 0000 - 0x0 7fff ffff
0x8000 0000 - 0xffff ffff : Translates to 36bit addresses 0x8 0000 0000 - 0x8 7fff ffff

I hope this makes it a bit clearer.

Hi,Kjetil:

Still cannot understand and more and more confused:

1.

Supposed that there are words wrong.

Is the 0x0 8000 000  36bit address? I think it is a 32bit address too.

2.

I know that MPAX can map 36 bit address to 32 bit address.

for example ,you can map 36 bit address 0x8 0000 0000 to 0x8000 0000.

But why map 0x0 8000 0000 to 0x8000 0000?

Although 0x0 8000 0000 is 36 bit address ,in fact I think 0x0 8000 0000

and 0x8000 0000 are the same address.

So you still cannot explain why one address map to itself ?

what does that mean addressA map to addressA?

Hi Steve,

1. 0x0 8000 0000 is a 36 bit address
The input before adress translation is always 32 bit and the output after address translation is always 36 bit, even if the leading bits are zero.

2. The MPAX configures how the DSP translates a 32 bit logical addresses into a 36 bit physical address. The 0x8000 0000 logical address is only translated to the physical address 0x0 8000 0000 if you have configured the MPAX registers to something other than the default values.

Kjetil Østerås said:

Hi Steve,

I might be using the wrong words for describing the memory configuration. When I say that i map 0x8000 0000 to 0x0 8000 0000 I really mean that I setup address translation, so the address 0x8000 0000 is translated to 0x0 8000 000. When programming the DSP you are only using 32bit addresses however the XMC provides the capability to extend this address to a 36bit address. So the XMC needs to know how to do this translation.

This address translation has to be programmed using the MPAX registers. The adress translation needs to be programmed even for the trivial translations. They need to be programmed even if you just want the 32bit address 0x8000 0000 to be translated to the 36bit address 0x0 8000 0000.

If you take a look at the Section 7.3.1.3 of the C66x CorePac User's Guide you will see that by default the MPAX register contains these address translations.

0x0000 0000 - 0x7fff ffff : Translates to 36bit addresses 0x0 0000 0000 - 0x0 7fff ffff
0x8000 0000 - 0xffff ffff : Translates to 36bit addresses 0x8 0000 0000 - 0x8 7fff ffff

I hope this makes it a bit clearer.

Hi,Kjetil:

1.

About what you said "so the address 0x8000 0000 is translated to 0x0 8000 000"

Do you think 0x0 8000 000 is also a written error?

Do you think 0x0 8000 000 should be 0x0 8000 0000?

when you say that "so the address 0x8000 0000 is translated to 0x0 8000 000"

Do you mean that 0x0 8000 0000 

2.
About your test project -7532.MemoryWriter-Fixed.
Void taskFxn(UArg a0, UArg a1)
{
    SetupMpax();
    WriteMemory((void *)0x80000000, "hi");
    ReadMemory((void *)0x80000000);
    ReadMemory((void *)0x60000000);
}

what's your test result?
when you readmemory from 0x8000 0000,Do you see the same value
when you readmemory from 0x6000 0000?

3.
I have do a test like you provide.

I config my MPAX1 the same as your SetupMpax function.
when I readmemory from 0x8000 0000,I get the same value as which
I readmemory from 0x6000 0000.
But I don't know why?
I just config MPAX1 to map 0x0 8000 0000 to 0x8000 0000.But I don't
make any remap or map with regard to address 0x6000 0000.why I get
the same value when I readmemory from 0x6000 0000 and from 0x8000 0000.

Hi,Kjetil :

You say that :

The 0x8000 0000 logical address is only translated to the physical address 0x0 8000 0000 if you have configured the MPAX registers to something other than the default values.

What do you mean?Would you provide a example to explain ?

Do you mean that as long as the default values are not configured it becomes automatic that

the 0x8000 0000 logical address is only translated to the physical address 0x0 8000 0000 regardless

that what you configure have relation with 0x8000 0000 of 0x0 8000 0000.

Hi Steve,

1. Yes I mean that 0x8000 0000 is translated to 0x0 8000 0000

2. The results are that both calls to the ReadMemory function print out the same bytes. So the content of 0x6000 0000 is the same as the content of 0x8000 0000 as described in the datasheet.

3. If you look at section 7.3.1.3 of the C66x CorePac User's Guide you will see that the reset value of MPAX0 configures the 2GiB range 0x0000 0000 - 0x7fff ffff to translate to 0x0 0000 0000 - 0x0 7fff ffff. So that is why you don't need to setup any additional address translation for the lower 2GiB.

And if you read the Keystone II memory map you will see that the 512MiB range starting at 0x6000 0000 is aliased to 0x0 8000 0000 (the first 512MB of DDR3B)

Hi Steve,

I don't understand the last three sentences you wrote.

By default 0x8000 0000 is translated to physical address 0x8 0000 0000. I re-configure MPAX 1 in order to translate 0x8000 0000 into physical address 0x0 8000 0000.

I suggest you read the whole section 7.3 of the TMS320C66x DSP CorePac User Guide. It has a complete description of the MPAX and it even has pictures that explain the setup.

Hi,Kjetil :

About point3 we discuss above.

First,of course I see that the 512MB range starting at 0x6000 0000 is aliased to 0x0 8000 0000 (the first 512MB of DDR3B) with keystone II memory map.

But that is not what I want to say.Let me give you another example or test case.Maybe you

can learn something from that.

I do another test on xtcievmk2x  like this:

step1:

I use default MPAX configure seg1.That mean 0x8000 0000 is translated to 0x8 0000 0000.

step2:

I  set the valueA from the address 0x6000 0000.

memset(0x6000 0000,10,1024); //1kb

step3:

I read memory respectively from 0x6000 0000 and 0x8000 0000.

The result is that value from 0x6000 0000 is 10 and the value from 0x8000 0000

is not 10.The value from 0x6000 0000 and from 0x8000 0000 are not the same value.

So, Now I ask you again. Why we get such result as the step3?

Do you think it is always wright for keystone II memory map that  the 512MiB range starting at 0x6000 0000 is aliased to 0x0 8000 0000 (the first 512MB of DDR3B)?

Why it is not wright in my test case I provided above?

It's what I want to say and want to ask.

Hi Steve,

You get this result because reading from 0x6000 0000 will read from the physical memory location 0x0 8000 0000 due to the memory aliasing and reading from 0x8000 0000 will read from the physical memory location 0x8 0000 0000 due to MPAX address translation.

Kjetil:

I know your idea.

what you consider that :

0x0 8000 0000 is 36bit(40bit for tci6638k2k) physical address even if its leading bits are zero

as you say before.

0x8000 0000 is 32bit virtual or logical address .

you think 0x0 8000 0000 and 0x8000 0000 are not the same address even if they are truly the

same value and equal from the view of math.So,of course you get different values from different

address.

So,hi,Kjetil,Don't I misunderstand what you mean?

But I just cannot realize the fact that 0x0 8000 0000 and 0x8000 0000 are not the same address.

Before I always believed that they were the same address and  not any doubt.