rare case: "Overflow detected on VIP0"

hb chen

Other Parts Discussed in Thread: TVP7002

Dear Experts,

We meet rare case.
Sometimes we meet "Overflow detected on VIP0".
We use FPGA to calculate the signal CRC error when "Overflow detected on VIP0" happens, but there is no CRC error.

We try to execute heavy menory bandwidth loading to duplicate this issue, but still not happen.

Is there any method to identify to root cause of this issue?

Thx ~

HB

over 11 years ago

0 Henry Wu1 over 11 years ago

Prodigy 70 points

Hi,

This is Henry, HB’s colleague.
We have a project called Corsica, which could compress SDI video input from RAW data to H.264 format by DM8148 (SDI input=>EQ=>FPGA=>DM8148).

In Corsica project, we found the VIP0 overflow several times.
a) In Corsica 2^nd samples, there is SDI signal unstable issue (caused by EQ), so we could see CRC error before VIP0 overflow.

b) In Corsica MP product, SDI signal unstable issue is solved, but we could still see the VIP0 overflow issue (and there is no CRC error before or after the overflow log).

Please check the attachment for log:

5722.log_20131202_burnin_troy.zip
=> Line 38241: FPGA CRC Counter:0
=> Line 38273: [m3vpss ] 21070977: CAPTURE: Overflow detected on VIP0, Total Resets = 1
=> Line 38490: FPGA CRC Counter:0

In DM8148 datasheet, we learn that there are 7 possible factors could lead to VIP0 overflow:

For 1 and 2, our FPGA team and S/W team tried stress test on DDR bandwidth, but the Corsica memory design is cable of handling the situation.

For 3, 4 and 5, we don’t use scaler function in Corsica, so they should not be related.

For 6 and 7, we think that SDI signal is stable enough in Corsica MP product (since there is no CRC error found in FPGA), but we could still see VIP0 overflow.

Considering the input signals to DSP, we also created NG frame data from FPGA (modify the SAV/EAV of a frame, so the frame data is not complete) on purpose, but that didn’t cause VIP0 overflow.

Could you help to check if there is any other factor that could lead the VIP0 overflow symptom?

Thank you.

Regards,

Henry Wu

0 Brian Chae over 11 years ago in reply to Henry Wu1

TI__Prodigy 130 points

First of all, do you know whether this is a persistent overflow (i.e., a lock up – data not getting written to the memory) or a momentary overflow (data getting captured ok but with wrong frame size information)?

I see that SDI input type is mentioned. What is the external device that converts SDI to VIP input data?

Also, to what format is the data getting captured into memory (422 – i.e., no processing through the VIP)?

If scaler and other conversion modules in the VIP are not enabled, it sounds more like an intermittent DDR overloading case.

Would you be able to check the descriptor output to check if a wrong sized frame gets captured when an interrupt is generated?

0 Henry Wu1 over 11 years ago in reply to Brian Chae

Prodigy 70 points

Hi Brian,

We are not sure the overflow is persistent or momentary. But from the log "5722.log_20131202_burnin_troy.zip" (see my earlier post), we think it's persistent overflow since the log doesn't meet the criteria of momentary overflow (frame size is correct).

I paste part of the log as below:
=
L38038: [m3vpss ] CH | Fields Fields Fields    FPS   FPS   FPS       Width      Height Fields      Count (Desc Error Y/C)
L38039: [m3vpss ] ------------------------------------------------------------------------------------------------------------
L38040: [m3vpss ] 000 | 1244652 1244652       0     59    59     0 1280 / 1280 720 / 720       1          0 0/0 (0/0)
L38041: [m3vpss ] 010 | 1244653 1244653       0     59    59     0 1280 / 1280   30 /   30       1          0 0/0 (0/0)
L38273: [m3vpss ] 21070977: CAPTURE: Overflow detected on VIP0, Total Resets = 1…
L38287: [m3vpss ] CH | Fields Fields Fields    FPS   FPS   FPS       Width      Height Fields      Count (Desc Error Y/C)
L38288: [m3vpss ] ------------------------------------------------------------------------------------------------------------
L38289: [m3vpss ] 000 | 1262636 1262636       0     59    59     0 1280 / 1280 720 / 720       2          0 0/0 (0/0)
L38290: [m3vpss ] 010 | 1262638 1262638       0     59    59     0 1280 / 1280   30 /   30       2          0 0/0 (0/0)
=

We use Xilinx FPGA (Spartan-6) to convert SDI to VIP input data (YUV422)
pCaptureInstPrm->inDataFormat = SYSTEM_DF_YUV422P;

We tried to generated wrong frame from FPGA (create incorrect SAV, EAV from FPGA), but we didn't see the overflow.

0 Badri Narayanan over 11 years ago in reply to Henry Wu1

TI__Guru 59700 points

If issue is due to momentary DDR starvation setting the DDR controller PBBPR may help. To set the PBBPR execute the following commands before running the application.

./mem_rdwr –rd 0x4c000054 to read the value and confirm it is 0xFFFFFFFF

./mem_rdwr –rd 0x4d000054 to read the value and confirm it is 0xFFFFFFFF

Then set

./mem_rdwr –wr 0x4c000054 0xFFFFFF20 to set PBBR_OLD to 0x20 for DDR0

./mem_rdwr –wr 0x4d000054 0xFFFFFF20 to set PBBR_OLD to 0x20 for DDR1

Then read back the value to confirm it is 0xFFFFFF20.

./mem_rdwr –rd 0x4c000054 to read the value and confirm it is 0xFFFFFF20

./mem_rdwr –rd 0x4d000054 to read the value and confirm it is 0xFFFFFF20

mem_rdwr can be found under /opt/dvr_rdk/ti814x/bin folder on the target filesystem.

Also if possible test with the VBI data capture channel disabled and confirm VIP overflow is happening even when only main 720P capture is happening. I know you require VBI data in your product .This step is just for debug.

0 hb chen over 11 years ago in reply to Badri Narayanan

Expert 2640 points

Dear Badri Narayanan,

Here is my default value:

[root@bin]# ./mem_rdwr.out --rd 0x4c000054 1

0x4c000054: 00FFFFFF

[root@bin]# ./mem_rdwr.out --rd 0x4d000054 1

0x4d000054: 00FFFFFF

===================

Should I set value to 0xFFFFFF20?? or 0x00FFFF20??

By the way, because "Overflow detected on VIP0" is rare case in our system.

It is very hard to duplicate this issue, but it is important, we cannot have this symptom.

I don't know how to confirm the setting value.

Can I adjust this value to duplicate this issue more easily?

(How to duplicate "Overflow detected on VIP0" more easily)

How to do that?

thx ~

0 Brijesh Jadav over 11 years ago in reply to hb chen

TI__Guru**** 476575 points

Hi,

Which hdvpss release you are using? I want to check if release you are using is the latest with the all the fixes.

Also it looks like there are two outputs from each VIP. Are these two input streams or two outputs from the same input streams? Could you please explains the dataflow within VIP and what all modules are used?

Regards,

Brijesh Jadav

0 hb chen over 11 years ago in reply to Brijesh Jadav

Expert 2640 points

Dear Brijesh Jadav,

DVRRDK 3.50.00.05/ HDVPSS 1.00.01.37
One VIP port, two input stream(Video and VBI),two output stream (Video and VBI

===add more information===

in our code:

capturePrm.numVipInst = 1;

capturePrm.outQueParams[0].nextLink = gSDI_VcapVencVdisObj.dupId[CAP_DUP_LINK_IDX_0];

capturePrm.outQueParams[1].nextLink = gVcapModuleContext.ipcFramesOutVpssToHostId;

for(vipInstId=0; vipInstId<capturePrm.numVipInst; vipInstId++)
    {
        pCaptureInstPrm                     = &capturePrm.vipInst[vipInstId];
        pCaptureInstPrm->vipInstId          = SYSTEM_CAPTURE_INST_VIP0_PORTA+vipInstId;
       pCaptureInstPrm->videoDecoderId     = SYSTEM_DEVICE_VID_DEC_ACLVFE_DRV;

        pCaptureInstPrm->inDataFormat       = SYSTEM_DF_YUV422P;
       pCaptureInstPrm->standard            = gVcapModuleContext.videoStatus.chStatus[0].standard;

        pCaptureInstPrm->numOutput          = 2;

        pCaptureOutPrm                      = &pCaptureInstPrm->outParams[0];
        pCaptureOutPrm->dataFormat          = SYSTEM_DF_YUV422I_YUYV;
        pCaptureOutPrm->scEnable            = FALSE;
        pCaptureOutPrm->scOutWidth          = gVcapModuleContext.videoStatus.chStatus[0].frameWidth;
        pCaptureOutPrm->scOutHeight         = gVcapModuleContext.videoStatus.chStatus[0].frameHeight;
        pCaptureOutPrm->outQueId          = 0;

       pCaptureOutPrm                       = &pCaptureInstPrm->outParams[1];
       pCaptureOutPrm->dataFormat           = SYSTEM_DF_RAW_VBI;
       pCaptureOutPrm->scEnable           = FALSE;

        pCaptureOutPrm->outQueId          = 1;

    }

THX ~

0 Brijesh Jadav over 11 years ago in reply to hb chen

TI__Guru**** 476575 points

Hello HB,

I see that you are capturing RAW_VBI as one of the output channels. You input format is YUV422 in BT1120 format and output is YUV422 without any scaling. Could you please confirm this?

Is it possible to disable VBI channels and see if it is working without any issue? This is to check if YUV or RAW VBI is causing overflow issue.

Are you capturing from TVP7002 decoder?

Regards,

Brijesh

0 hb chen over 11 years ago in reply to Brijesh Jadav

Expert 2640 points

Dear Brijesh,

>>You input format is YUV422 in BT1120 format and output is YUV422 without any scaling. Could you please confirm this?

Yes, we didn't use scaling function in Capture link.

Sorry, currently, withou VBI channel, our software cannot work. And it's hard to modify this testing situation in our software.

Our environment:

Camcorder --> (SDI signal)--> EQ -->FPGA --> (VIP Port) -->DM8148

0 Brijesh Jadav over 11 years ago in reply to hb chen

TI__Guru**** 476575 points

Hi HB,

Are you running any high bandwidth iontensive task on A8 or on any other core?

Regards,

Brijesh Jadav

0 hb chen over 11 years ago in reply to Brijesh Jadav

Expert 2640 points

Dear Brijesh Jadav,

Our application encode one video input to two output stream.

Maximum input resolution/frame is 1280x720/60p.

First output is mp2ts streaming (640x360). Maximum bit-rate is around 3Mbps.

Second output is mp4 file that save to SD card (1280x720). Maximum bit-rate is around 9Mbps.

A8 CPU usage is around 50%.

We tried some stress test on DDR bandwidth, but we cannot duplicate this issue in short time.

I think Memory bandwidth should be enough.

McFW Link architecture:

Capture
                       |
                       DUP0
                   0   |     1
                   -----------
                   (I)          (P)
                   |          |
                   Dei0        |
                    |          |
                    ------------
                        |
                      Merge0
                        |
                      Select
                        |
                      DUP1
                        |
                    ----------
                    |         |
                  SCL0       SCL1
                    |         |
                  (MP4)    (MP2TS)
                    |         |
                    -----------
                        |
                      Merge1
                        |
                       NSF
                        |
                       ENC

0 Brijesh Jadav over 11 years ago in reply to hb chen

TI__Guru**** 476575 points

Hi HB,

I meant DDR bandwidth from A8. High ddr bandwidth on A8 could potentially cause overflow. Do you have any high ddr bandwidth tasks running on A8?

In your set up, There is a fpga, which i guess converts SDI signal to BT1120 signal. Could you please see there is no problem here in the pixel clock? Even clock skew or polarity change in clock could potentially cause overflow.

Regards,

Brijesh Jadav

0 Henry Wu1 over 11 years ago in reply to Brijesh Jadav

Prodigy 70 points

Hi Brijesh,
CC HB,

Do you have any high ddr bandwidth tasks running on A8?
[Henry] No, we could see the symptom without high ddr bandwidth task running on A8.

Could you please see there is no problem here in the pixel clock? Even clock skew or polarity change in clock could potentially cause overflow.
[Henry] Our FPGA will do data write on negative edge and DM8148 will do data read on next positive edge. There is only 1 clock for VIP0, and all 16 VIP Data signals (D0~D15) could meet the set-up time/hold time requirement. So we don't think there are clock skew issues.

Regards,

Henry Wu

0 Renjith Thomas over 11 years ago in reply to Henry Wu1

Guru 31670 points

Henry,

I haven't gone through the discussion completely. But this is my analysis on the issue. The real issue in my opinion is not lack of DDR bandwidth. Its the lock up of L3 bus which results in starvation of HDVPSS as well as other bus masters resulting in this behavior.

Since HDVPSS needs to access the DDR through L3 bus very frequently and periodically, any other peripheral locking up the bus for few micro seconds can cause the 4K FIFO in capture to overflow. Also note that the overflow can be 1-byte or more. So the overflow flag can be set for a momentary contention in the L3 bus.

Another observation that I had about this issue is that, A8 accessing the L3 is causing more trouble. For eg, you run iperf tool with -d option, you'll see a lot of overflows. Or a simple write or read(uncached) to/from NAND or other storage device can cause similar overflows.

0 Henry Wu1 over 11 years ago in reply to Renjith Thomas

Prodigy 70 points

Hi Renjith,

Thank you for reply.
We just did an experiment which performs "streaming", "MP4 recording (to SD card)" and "./iperf -c localhost –d", but there is no overflow symptom. Could you help to double check if the behavior (lock up of L3 bus) is under "1920x1080 60p" condition? Our application runs at "3Mbps streaming (to network) + mp4 9Mbps (to SD card)", and the maximum input could be 1280x720/60p, if the "lock up of L3 bus" happens in "1920x1080 60p", which might not be the case.

Input: SDI/1280x720 60p
Operation1: Streaming
Operation 2: MP4 Recording
Operation 3: ./iperf -c localhost –d

[root@buildroot ~]# ./iperf -c localhost -d
------------------------------------------------------------
Server listening on TCP port 5001
TCP window size: 85.3 KByte (default)
------------------------------------------------------------
------------------------------------------------------------
Client connecting to localhost, TCP port 5001
TCP window size: 49.4 KByte (default)
------------------------------------------------------------
[ 5] local 127.0.0.1 port 36873 connected with 127.0.0.1 port 5001
[ 4] local 127.0.0.1 port 5001 connected with 127.0.0.1 port 36873
[ ID] Interval       Transfer     Bandwidth
[ 5] 0.0-10.0 sec   531 MBytes   444 Mbits/sec
[ 4] 0.0-10.1 sec   531 MBytes   441 Mbits/sec
[root@buildroot ~]#

0 Brijesh Jadav over 11 years ago in reply to Henry Wu1

TI__Guru**** 476575 points

Hi,

Both of these operations, iperf or Nand read/write are mostly done from A8, so as i mentioned earlier, if you do any high bandwidth task from A8, which has direct path to EMIF, can potentially cause overflow in VIP.

Regards,

Brijesh Jadav

0 Renjith Thomas over 11 years ago in reply to Henry Wu1

Guru 31670 points

Hi Henry,

There is no point in trying with local host. You need to setup a iperf server and try running the test. Do remember to use -d.

http://processors.wiki.ti.com/index.php/Iperf

0 Renjith Thomas over 11 years ago in reply to Brijesh Jadav

Guru 31670 points

Hi Brijesh,

But in case of NAND the throughput is roughly around 8-10MB/sec, which is not a high-bandwidth use-case at all. Even though A8 has a dedicated path to DMM (ELLA) the issue is more pronounced when A8 access the L3 bus not ELLA. We've tried similar experiments before.

0 Henry Wu1 over 11 years ago in reply to Renjith Thomas

Prodigy 70 points

Hi Renjith,

Currently, the result seems to come from peripheral I/O competing L3 with VPSS.
(Since HDVPSS needs to access the DDR through L3 bus very frequently and periodically, any other peripheral locking up the bus for few micro seconds can cause the 4K FIFO in capture to overflow. Also note that the overflow can be 1-byte or more. So the overflow flag can be set for a momentary contention in the L3 bus.)

Test:
Server (iperf.exe –s ) / Windows7
Client (./iperf -c 192.168.20.15 -d -t 3000)
DM8148 Platform, operations: Streaming (network) + MP4 Recording (SD card)
We could see 9 times of "Overflow detected" in 30 minutes.
If we perform streaming only, we check the test for about 10 minutes and there is no overflow detected.

We have 2 questions:
1) Could we adjust L3 access priority of periphery I/O?
2) Can this issue be fixed? Already fixed by TI?

Thank you.

0 Badri Narayanan over 11 years ago in reply to Henry Wu1

TI__Guru 59700 points

As mentioned by Brijesh initially high b/w DDR access from A8 will cause VIP overflow. The case you have recreated and the actual reason for VIP overflow when running your application may be unrelated to issue you have recreated here.

1. Have you set the EMIF PBBPR setting as I mentioned previously for this test. If not pls set it and retry.

2. Pls share the logs of ./sys_pri.out --printAll

3. Confirm the following code is present in your codebase:

/dvr_rdk/mcfw/src_bios6/links_m3vpss/system/system_m3vpss.c

System_init

    #if 1
    Vps_printf (" %d: SYSTEM  : Set Static L3 pressure for HDVPSS as High\n", Utils_getCurTimeInMsec());
    Utils_setL3Pressure (UTILS_INITIATOR_HDVPSS0, UTILS_L3_PRESSURE_HIGH);
    Utils_setL3Pressure (UTILS_INITIATOR_HDVPSS1, UTILS_L3_PRESSURE_HIGH);
    #endif

4. Share your kernel /uboot boot logs on the board where you are running the test.

0 Renjith Thomas over 11 years ago in reply to Henry Wu1

Guru 31670 points

Hi Henry,

We can discuss once you try what Badri has requested. Btw, what is your resolution and frame rate of the video capture? How many channels do you have?

0 Henry Wu1 over 11 years ago in reply to Badri Narayanan

Prodigy 70 points

Hi Badri, Renjith

>>Have you set the EMIF PBBPR setting as I mentioned previously for this test. If not pls set it and retry.
Yes. But "Overflow detected on VIP0" is rare case in our system. Thus, I cannot say changing PBBPR setting is the answer. And then, we just did two experiments. Both cases have iperf server(./iperf -s)/client(./iperf -c 192.168.20.15 -d -t 1800) tesing.

Case 1: without changing PBBPR setting. "Overflow detected on VIP0" occurs (3 times in 10 minutes). Please see log "teraterm_n1.log".

Case 2: changing PBBPR setting. "Overflow detected on VIP0" occurs. (twice in 20 minutes, the fail rate seems lower, but it still happens). Please see log "teraterm_m2.log".

Search keyword < 0x4c000054 , 0x4d000054 , Overflow detected , L3 Bandwith Regulator > to check log information.

>>Pls share the logs of ./sys_pri.out –printAll
Please see log "teraterm_n1.log" and "teraterm_m2.log".

>>Confirm the following code is present in your codebase:
Yes. This code is present in our codebase

Thank you.

4130.teraterm_n1.log 0702.teraterm_m2.log

0 Badri Narayanan over 11 years ago in reply to Henry Wu1

TI__Guru 59700 points

Do you have a board with Silicon revision 3.0 populated ? PG2.1 has silicon advisory 2.1.68 where A8 can cause starvation of other initiators.

Run the sys_pri after executing load.sh.Currently the logs don't show anything.

Also ensure the sys_pri is correctly compiled for 814x and not any other processor. I am seeing memory access error which indicates wrong address is being accessed.

0 Renjith Thomas over 11 years ago in reply to Badri Narayanan

Guru 31670 points

Badri,

Can you confirm that the silicon revision 3.0 will solve this? One of our customer is facing similar issues.

0 hb chen over 11 years ago in reply to Badri Narayanan

Expert 2640 points

Dear Badri,

CC Henry,

Sorry ~ We don't have version 3.0.

Do you mean this issue should be resolved in version 3.0?

In rules.make, we set DVR_RDK_BOARD_TYPE := DM814X_TI_EVM.

It should be compiled for 814x.

Below attached file is the log that run the sys_pri after executing load.sh.

However, seems same result.

Fullscreen 5047.teratermaa.log Download


U-Boot 2010.06-svn769 (Jul 19 2013 - 17:53:55)

TI8148-GP rev 2.1

ARM clk: 720MHz
DDR clk: 400MHz

DRAM:  2 GiB
Using default environment

The 2nd stage U-Boot will now be auto-loaded
Please do not interrupt the countdown till TI8148_EVM prompt if 2nd stage is already flashed
Hit any key to stop autoboot:  0 
512 KiB SST25VF040B at 0:0 is now current device
## Starting application at 0x81000000 ...


U-Boot 2010.06-svn769 (Jul 19 2013 - 17:54:26)

TI8148-GP rev 2.1

ARM clk: 720MHz
DDR clk: 400MHz

I2C:   ready
DRAM:  2 GiB
NAND:  HW ECC BCH8 Selected
No NAND device found!!!
0 MiB
MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
                          .:;rrr;;.                   
                    ,5#@@@@#####@@@@@@#2,             
                 ,A@@@hi;;;r5;;;;r;rrSG@@@A,          
               r@@#i;:;s222hG;rrsrrrrrr;ri#@@r        
             :@@hr:r;SG3ssrr2r;rrsrsrsrsrr;rh@@:      
            B@H;;rr;3Hs;rrr;sr;;rrsrsrsrsrsr;;H@B     
           @@s:rrs;5#;;rrrr;r#@H:;;rrsrsrsrsrr:s@@    
          @@;;srs&X#9;r;r;;,2@@@rrr:;;rrsrsrsrr;;@@   
         @@;;rrsrrs@MB#@@@@@###@@@@@@#rsrsrsrsrr;;@@  
        G@r;rrsrsr;#X;SX25Ss#@@#M@#9H9rrsrsrsrsrs;r@G 
        @9:srsrsrs;2@;:;;:.X@@@@@H::;rrsrsrsrsrsrr:3@ 
       X@;rrsrsrsrr;XAi;;:&@@#@Bs:rrsrsrsrsrsrsrsrr;@X
       @#;rsrsrsrsrr;r2ir@@@###::rrsrsrsrsrsrsrsrsr:@@
       @A:rrsrsrsrr;:2@29@@M@@@;:;rrrrsrsrsrsrsrsrs;H@
       @&;rsrsrsrr;A@@@@@@###@@@s::;:;;rrsrsrsrsrsr;G@
       @#:rrsrsrsr;G@5Hr25@@@#@@@#9XG9s:rrrrsrsrsrs:#@
       M@;rsrsrsrs;r@&#;::S@@@@@@@M@@@@Grr:;rsrsrsr;@#
       :@s;rsrsrsrr:M#Msrr;;&#@@@@@@@@@@H@@5;rsrsr;s@,
        @@:rrsrsrsr;S@rrrsr;:;r3MH@@#@M5,S@@irrsrr:@@ 
         @A:rrsrsrsrrrrrsrsrrr;::;@##@r:;rH@h;srr:H@  
         ;@9:rrsrsrsrrrsrsrsrsr;,S@Hi@i:;s;MX;rr:h@;  
          r@B:rrrrsrsrsrsrsrr;;sA@#i,i@h;r;S5;r:H@r   
           ,@@r;rrrsrsrsrsrr;2BM3r:;r:G@:rrr;;r@@,    
             B@Mr;rrrrsrsrsr@@S;;;rrr:5M;rr;rM@H      
              .@@@i;;rrrrsrs2i;rrrrr;r@M:;i@@@.       
                .A@@#5r;;;r;;;rrr;r:r#AsM@@H.         
                   ;&@@@@MhXS5i5SX9B@@@@G;            
                       :ihM#@@@@@##hs,                

Net:   Detected MACID:50:56:63:b8:89:f4
cpsw
Hit any key to stop autoboot:  1  0 
reading boot.scr

308 bytes read
fatload mmc 1:1 ok
Running bootscript from MMC/SD to set the ENV...
## Executing script at 80900000
Device: OMAP SD/MMC
Manufacturer ID: 11
OEM: 100
Name: 008G9 
Tran Speed: 25000000
Rd Block Len: 512
MMC version 4.0
High Capacity: Yes
Capacity: 3909091328
Bus Width: 4-bit
reading uImage_3

2717272 bytes read
## Booting kernel from Legacy Image at 81000000 ...
   Image Name:   Linux-2.6.37+
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    2717208 Bytes = 2.6 MiB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
Linux version 2.6.37+ (hbchen@linux-computer) (gcc version 4.3.3 (Sourcery G++ Lite 2009q1-203) ) #1 PREEMPT Thu Aug 1 15:04:02 CST 2013
CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7f
CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine: ti8148evm
bootconsole [earlycon0] enabled
ti81xx_reserve: ### Reserved DDR region @97f00000
reserved size = 0 at 0x0
Memory policy: ECC disabled, Data cache writeback
OMAP chip is TI8148 2.1
SRAM: Mapped pa 0x402f1000 to va 0xfe400000 size: 0xf000
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 97280
Kernel command line: mem=384M ddr_mem=1024M console=ttyO0,115200n8 rootwait root=/dev/mmcblk0p3 earlyprintk notifyk.vpssm3_sva=0xBFD00000 ip=off noinitrd
PID hash table entries: 2048 (order: 1, 8192 bytes)
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
Memory: 383MB = 383MB total
Memory: 382820k/382820k available, 10396k reserved, 0K highmem
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
    DMA     : 0xffc00000 - 0xffe00000   (   2 MB)
    vmalloc : 0xd8800000 - 0xf8000000   ( 504 MB)
    lowmem  : 0xc0000000 - 0xd8000000   ( 384 MB)
    pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
    modules : 0xbf000000 - 0xbfe00000   (  14 MB)
      .init : 0xc0008000 - 0xc0040000   ( 224 kB)
      .text : 0xc0040000 - 0xc0532000   (5064 kB)
      .data : 0xc0532000 - 0xc057b5c0   ( 294 kB)
SLUB: Genslabs=11, HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:375
IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts
Total of 128 interrupts on 1 active controller
GPMC revision 6.0
Trying to install interrupt handler for IRQ368
Trying to install interrupt handler for IRQ369
Trying to install interrupt handler for IRQ370
Trying to install interrupt handler for IRQ371
Trying to install interrupt handler for IRQ372
Trying to install interrupt handler for IRQ373
Trying to install interrupt handler for IRQ374
Trying to install type control for IRQ375
Trying to set irq flags for IRQ375
OMAP clockevent source: GPTIMER1 at 20000000 Hz
Console: colour dummy device 80x30
Calibrating delay loop... 719.25 BogoMIPS (lpj=3596288)
pid_max: default: 32768 minimum: 301
Security Framework initialized
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
devtmpfs: initialized
TI81XX: Map 0x97f00000 to 0xfe500000 for dram barrier
TI81XX: Map 0x40300000 to 0xfe600000 for sram barrier
omap_voltage_early_init: voltage driver support not added
regulator: core version 0.5
regulator: dummy: 
NET: Registered protocol family 16
omap_voltage_domain_lookup: Voltage driver init not yet happened.Faulting!
omap_voltage_add_dev: VDD specified does not exist!
OMAP GPIO hardware version 0.1
OMAP GPIO hardware version 0.1
OMAP GPIO hardware version 0.1
OMAP GPIO hardware version 0.1
omap_mux_init: Add partition: #1: core, flags: 4
_omap_mux_init_gpio: Could not set gpio38
clk get on i2c3 fck failed
Cannot clk_get ck_32
Debugfs: Only enabling/disabling deep sleep and wakeup timer is supported now
registered ti81xx_vpss device
registered ti81xx_vidout device
registered ti81xx_vin device
bio: create slab <bio-0> at 0
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
USBSS revision 4ea2080b
registerd cppi-dma Intr @ IRQ 17
Cppi41 Init Done
omap_i2c omap_i2c.1: bus 1 rev4.0 at 100 kHz
omap_i2c omap_i2c.2: bus 2 rev4.0 at 100 kHz
Advanced Linux Sound Architecture Driver Version 1.0.23.
Switching to clocksource gp timer
musb-hdrc: version 6.0, host, debug=0
musb-hdrc musb-hdrc.0: dma type: dma-cppi41
MUSB controller-0 revision 4ea20800
usb2phy_config: musb(0) rxcalib done, rxcalib read value 6f6cdf76
musb-hdrc musb-hdrc.0: MUSB HDRC host driver
musb-hdrc musb-hdrc.0: new USB bus registered, assigned bus number 1
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: MUSB HDRC host driver
usb usb1: Manufacturer: Linux 2.6.37+ musb-hcd
usb usb1: SerialNumber: musb-hdrc.0
usb usb1: DeviceClass=0x09
usb usb1: InterfaceClass=0x09
hub 1-0:1.0: USB hub found
busnum(1) 
idVendor(0x1d6b) idProduct(2)
hub 1-0:1.0: 1 port detected
hub_configure bbb ed 
hub_testmode_init_1 
hub_testmode_init_1 4265
musb-hdrc musb-hdrc.0: USB Host mode controller at d881e000 using DMA, IRQ 18
musb-hdrc musb-hdrc.1: dma type: dma-cppi41
MUSB controller-1 revision 4ea20800
usb2phy_config: musb(1) rxcalib done, rxcalib read value 6f715d66
musb-hdrc musb-hdrc.1: MUSB HDRC host driver
musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 2
usb usb2: New USB device found, idVendor=1d6b, idProduct=0002
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: MUSB HDRC host driver
usb usb2: Manufacturer: Linux 2.6.37+ musb-hcd
usb usb2: SerialNumber: musb-hdrc.1
usb usb2: DeviceClass=0x09
usb usb2: InterfaceClass=0x09
hub 2-0:1.0: USB hub found
busnum(2) 
idVendor(0x1d6b) idProduct(2)
hub 2-0:1.0: 1 port detected
hub_configure bbb ed 
hub_testmode_init_2 
hub_testmode_init_2 4281
musb-hdrc musb-hdrc.1: USB Host mode controller at d8828800 using DMA, IRQ 19
NET: Registered protocol family 2
IP route cache hash table entries: 4096 (order: 2, 16384 bytes)
TCP established hash table entries: 16384 (order: 5, 131072 bytes)
TCP bind hash table entries: 16384 (order: 4, 65536 bytes)
TCP: Hash tables configured (established 16384 bind 16384)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
NetWinder Floating Point Emulator V0.97 (double precision)
PMU: registered new PMU device of type 0
omap-iommu omap-iommu.0: ducati registered
omap-iommu omap-iommu.1: sys registered
JFFS2 version 2.2. (NAND) ? 2001-2006 Red Hat, Inc.
msgmni has been set to 747
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
omap_uart.0: ttyO0 at MMIO 0x48020000 (irq = 72) is a OMAP UART0
console [ttyO0] enabled, bootconsole disabled
console [ttyO0] enabled, bootconsole disabled
omap_uart.1: ttyO1 at MMIO 0x48022000 (irq = 73) is a OMAP UART1
omap_uart.2: ttyO2 at MMIO 0x48024000 (irq = 74) is a OMAP UART2
omap_uart.3: ttyO3 at MMIO 0x481a6000 (irq = 44) is a OMAP UART3
omap_uart.4: ttyO4 at MMIO 0x481a8000 (irq = 45) is a OMAP UART4
omap_uart.5: ttyO5 at MMIO 0x481aa000 (irq = 46) is a OMAP UART5
brd: module loaded
loop: module loaded
omap2-nand driver initializing
davinci_mdio davinci_mdio.0: davinci mdio revision 1.6
davinci_mdio davinci_mdio.0: detected phy mask ffefffff
davinci_mdio.0: probed
davinci_mdio davinci_mdio.0: phy[20]: device 0:14, driver unknown
usbcore: registered new interface driver cdc_ether
usbcore: registered new interface driver dm9601
usbcore: registered new interface driver cdc_acm
cdc_acm: v0.26:USB Abstract Control Model driver for USB modems and ISDN adapters
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
mice: PS/2 mouse device common for all mice
rtc-s35390a 2-0030: rtc core: registered rtc-s35390a as rtc0
i2c /dev entries driver
Linux video capture interface: v2.00
usbcore: registered new interface driver uvcvideo
USB Video Class driver (v1.0.0)
OMAP Watchdog Timer Rev 0x00: initial timeout 60 sec
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
notify_init : notify drivercreated  for  remote proc id 2 at physical Address 0xbfd00000
usbcore: registered new interface driver snd-usb-audio
Registered tvp5158 audio codec
asoc: HDMI-DAI-CODEC <-> hdmi-dai mapping ok
asoc: ACLVFE-DAI-CODEC <-> davinci-mcasp.0 mapping ok
asoc: ACLVFE-DAI-CODEC <-> davinci-mcasp.1 mapping ok
asoc: HDMI-DAI-CODEC <-> hdmi-dai mapping ok
ALSA device list:
  #0: TI8168 ACLVFE
  #1: TI81XX SOUND1
Netfilter messages via NETLINK v0.30.
nf_conntrack version 0.5.0 (5981 buckets, 23924 max)
ctnetlink v0.93: registering with nfnetlink.
ip_tables: (C) 2000-2006 Netfilter Core Team
TCP cubic registered
NET: Registered protocol family 17
Registering the dns_resolver key type
VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
omap_voltage_late_init: Voltage driver support not added
Power Management for TI81XX.
Detected MACID=84:7e:40:68:d2:62
Detected MACID=84:7e:40:68:d2:63
rtc-s35390a 2-0030: setting system clock to 2013-01-03 23:01:21 UTC (1357254081)
Waiting for root device /dev/mmcblk0p3...
mmc0: new high speed MMC card at address 0001
mmcblk0: mmc0:0001 008G92 3.64 GiB 
 mmcblk0: p1 p2 p3 p4 < p5 p6 p7 p8 p9 p10 p11 p12 >
EXT3-fs: barriers not enabled
kjournald starting.  Commit interval 5 seconds
EXT3-fs (mmcblk0p3): using internal journal
EXT3-fs (mmcblk0p3): recovery complete
EXT3-fs (mmcblk0p3): mounted filesystem with writeback data mode
VFS: Mounted root (ext3 filesystem) on device 179:3.
devtmpfs: mounted
Freeing init memory: 224K
mmc1: host does not support reading read-only switch. assuming write-enable.
mmc1: new high speed SDHC card at address 59b4
mmcblk1: mmc1:59b4 NCard 14.7 GiB 
 mmcblk1: p1
Starting logging: OK
Starting ACL S19 Local procedure...
--------------
 
 0x4c000054: 00FFFFFF
 
 
 0x4d000054: 00FFFFFF
 
 
 ORG 0x4c000054: ffffff
 NEW 0x4c000054: ffff20
 
 
 ORG 0x4d000054: ffffff
 NEW 0x4d000054: ffff20
 
 
 0x4c000054: 00FFFF20
 
 
 0x4d000054: 00FFFF20
 
--------------
Initializing random number generator... done.
Starting network...
Getting initial time via ntpNET: Registered protocol family 10
.
Starting network time protocol daemon: ntpd.
Starting sshd: OK
Starting ACL Local procedure...
--------------
Auto mount storage device to /media/xxx
mmcblk1p1
umount: can't umount /media/mmcblk1p1: Invalid argument
Thu Jan  3 23:01:22 2013  0.000000 seconds
--------------
FPGA Version:
0x13fe
0x800e
0x0011
--------------

CPSW phy found : id is : 0x3b1861
ADDRCONF(NETDEV_UP): eth1: link is not ready
*** Bootargs Validated for mem param ***
*** Bootargs Validated for notifyk.vpssm3 params ***
Kernel bootargs validated
amixer: Cannot find the given element from control default

 [c6xdsp ] Remote Debug Shared Memory @ 0xbff00000
 [m3video] Remote Debug Shared Memory @ 0xbff05020
 [m3vpss ] Remote Debug Shared Memory @ 0xbff0a040
SysLink version : 2.20.02.20
SysLink module created on Date:Aug  6 2013 Time:16:53:29
Trace enabled
Trace SetFailureReason enabled
 Setting DMM priority for [DUCATI  ] to [0] ( 0x4e000624 = 0x08000000 )
 Setting DMM priority for [HDVICP0 ] to [2] ( 0x4e000634 = 0x0000000a )
/opt/dvr_rdk/ti814x
Attached to slave procId 2.
Loaded file ../firmware/dvr_rdk_fw_m3vpss_1024M_384M.xem3 on slave procId 2.
Started slave procId 2.
After Ipc_loadcallback status [0x00000000]
 [m3vpss ] 	ISS Freq  : 400 MHz
 [m3vpss ] ***** SYSTEM  : Frequency <ORG> - 200000000, <NEW> - 200000000
 [m3vpss ] notify_attach  rtnVal  0
 [m3vpss ] initProxyServer  rtnVal  0
 [m3vpss ]  
 [m3vpss ]  *** UTILS: CPU KHz = 400000 Khz ***
 [m3vpss ]  
 [m3vpss ]  51: SYSTEM  : System Common Init in progress !!!
 [m3vpss ]  51: SYSTEM: IPC init in progress !!!
 [m3vpss ]  51: SYSTEM: Attaching to [HOST] ... 
 [m3vpss ]  54: SYSTEM: Attaching to [HOST] ... SUCCESS !!!
After Ipc_startcallback status [0x00000000]
Attached to slave procId 1.
Loaded file ../firmware/dvr_rdk_fw_m3video_1024M_384M.xem3 on slave procId 1.
Started slave procId 1.
After Ipc_loadcallback status [0x00000000]
 [m3video] 	ISS Freq  : 400 MHz
After Ipc_startcallback status [0x00000000]
 [m3video] ***** SYSTEM  : Frequency <ORG> - 200000000, <NEW> - 200000000
 [m3video]  
 [m3video]  *** UTILS: CPU KHz = 400000 Khz ***
 [m3video]  
 [m3video]  262: SYSTEM  : System Common Init in progress !!!
 [m3video]  262: SYSTEM: IPC init in progress !!!
 [m3video]  262: SYSTEM: Attaching to [HOST] ... 
 [m3video]  265: SYSTEM: Attaching to [HOST] ... SUCCESS !!!
Attached to slave procId 0.
Loaded file ../firmware/dvr_rdk_fw_c6xdsp_1024M_384M.xe674 on slave procId 0.
Started slave procId 0.
After Ipc_loadcallback status [0x00000000]
 [c6xdsp ] 	DSP Freq  : 500 MHz
After Ipc_startcallback status [0x00000000]
 [m3video]  403: SYSTEM: Attaching to [DSP] ... SUCCESS !!!
 [m3vpss ]  405: SYSTEM: Attaching to [DSP] ... SUCCESS !!!
 [c6xdsp ] ***** SYSTEM  : Frequency <ORG> - 500000000, <NEW> - 500000000
 [m3video]  407: SYSTEM: Attaching to [VPSS-M3] ... SUCCESS !!!
 [m3vpss ]  407: SYSTEM: Attaching to [VIDEO-M3] ... SUCCESS !!!
 [c6xdsp ]  
 [m3video]  407: SYSTEM: Creating MsgQ Heap [IPC_MSGQ_MSG_HEAP_1] ...
 [m3vpss ]  407: SYSTEM: Creating MsgQ Heap [IPC_MSGQ_MSG_HEAP_2] ...
 [c6xdsp ]  *** UTILS: CPU KHz = 500000 Khz DMA: Module install successful, device major num = 251 
***
 [m3video] DRV: Module install successful
 408: SYSTEM: Creating MsgQ [VIDEO-M3_MSGQ] ...
 [m3vpss ]  408: SYSTEM: CreatiDRV: Module built on Aug  6 2013 16:54:03 
ng MsgQ [VPSS-M3_MSGQ] ...
 [c6xdsp ]  
 [m3video]  408: SYSTEM: Creating MsgQ [VIDEO-M3_ACK_MSGQ] ...
 [m3vpss ]  408: SYSTEM: Creating MsgQ [VPSS-M3_ACK_MSGQ] ...
 [c6xdsp ]  1: SYSTEM  : System Common Init in progress !!!
 [m3video]  410: SYSTEM: Notify register to [HOST] line 0, event 15 ... 
 [m3vpss ]  410: SYSTEM: Notify register to [HOST] line 0, event 15 ... 
 [c6xdsp ]  1: SYSTEM: IPC init in progress !!!
 [m3video]  411: SYSTEM: Notify register to [DSP] line 0, event 15 ... 
 [m3vpss ]  411: SYSTEM: Notify register to [DSP] line 0, event 15 ... 
 [c6xdsp ]  1: SYSTEM: Attaching to [HOST] ... 
 [m3video]  411: SYSTEM: Notify register to [VPSS-M3] line 0, event 15 ... 
 [m3vpss ]  411: SYSTEM: Notify register to [VIDEO-M3] line 0, event 15 ... 
 [c6xdsp ]  4: SYSTEM: Attaching to [HOST] ... SUCCESS !!!
 [m3video]  411: SYSTEM: IPC init DONE !!!
 [m3vpss ]  411: SYSTEM: IPC init DONE !!!
 [c6xdsp ]  6: SYSTEM: Attaching to [VIDEO-M3] ... SUCCESS !!!
 [c6xdsp ]  8: SYSTEM: Attaching to [VPSS-M3] ... SUCCESS !!!
 [c6xdsp ]  8: SYSTEM: Creating MsgQ Heap [IPC_MSGQ_MSG_HEAP_0] ...
 [c6xdsp ]  8: SYSTEM: Creating MsgQ [DSP_MSGQ] ...
 [c6xdsp ]  8: SYSTEM: Creating MsgQ [DSP_ACK_MSGQ] ...
 [c6xdsp ]  9: SYSTEM: Notify register to [HOST] line 0, event 15 ... 
 [c6xdsp ]  9: SYSTEM: Notify register to [VIDEO-M3] line 0, event 15 ... 
 [c6xdsp ]  9: SYSTEM: Notify register to [VPSS-M3] line 0, event 15 ... 
 [c6xdsp ]  9: SYSTEM: IPC init DONE !!!
 [c6xdsp ]  12: MEM: Shared Region 2: Base = 0xa8000000, Length = 0x17000000 (368 MB) 
 [c6xdsp ]  12: MEM: ERROR: SharedRegion_setEntry (2, 0x9f485bfc) FAILED !!!  (status=-1) 
 [c6xdsp ]  22: MEM: ERROR: SharedRegion_setEntry (2, 0x9f485bfc) FAILED !!!  (status=-1) 
 [m3video]  420: MEM: Shared Region 2: Base = 0xa8000000, Length = 0x17000000 (368 MB) 
 [m3vpss ]  420: MEM: Shared Region 2: Base = 0xa8000000, Length = 0x17000000 (368 MB) 
 [m3video]  420: MEM: Shared Region 1: Base = 0x98000000, Length = 0x04700000 (71 MB) 
 [m3vpss ]  420: MEM: Shared Region 1: Base = 0x98000000, Length = 0x04700000 (71 MB) 
 [m3video]  423: SYSTEM  : System Common Init Done !!!
 [m3vpss ]  422: SYSTEM  : System Common Init Done !!!
 [m3video]  423: SYSTEM  : System Video Init in progress !!!
 [m3vpss ]  423: SYSTEM  : System VPSS Init in progress !!!
 [m3video]  423: SYSTEM  : System Video Init Done !!!
 [m3video]  424: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_0] in region 0 ...
 [m3video]  424: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_0] in region 0 ...
 [m3video]  424: SYSTEM: ListElem Shared Addr = 0xbf173e00
 [c6xdsp ]  32: MEM: Shared Region 1: Base = 0x98000000, Length = 0x04700000 (71 MB) 
 [m3video]  427: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_1] in region 0 ...
 [c6xdsp ]  32: SYSTEM  : System Common Init Done !!!
 [m3video]  428: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_1] in region 0 ...
 [c6xdsp ]  31: SYSTEM  : System DSP Init in progress !!!
 [m3video]  428: SYSTEM: ListElem Shared Addr = 0xbf177300
 [c6xdsp ]  32: SYSTEM  : RpeServer_init() done... Ret Val 0!!!
 [c6xdsp ]  37: SYSTEM: Creating ListMP [DSP_IPC_OUT_19] in region 0 ...
 [c6xdsp ]  37: SYSTEM: Creating ListMP [DSP_IPC_IN_19] in region 0 ...
 [c6xdsp ]  37: SYSTEM: ListElem Shared Addr = 0xbf17a800
 [c6xdsp ]  39: SYSTEM: Creating ListMP [DSP_IPC_OUT_20] in region 0 ...
 [m3video]  436: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_19] in region 0 ...
 [m3vpss ] === I2C0/2 Clk is active ===
 [c6xdsp ]  39: SYSTEM: Creating ListMP [DSP_IPC_IN_20] in region 0 ...
 [m3video]  437: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_19] in region 0 ...
 [m3vpss ]  442: SYSTEM: Creating ListMP [VPSS-M3_IPC_OUT_0] in region 0 ...
 [c6xdsp ]  39: SYSTEM: ListElem Shared Addr = 0xbf19e080
 [m3video]  437: SYSTEM: ListElem Shared Addr = 0xbf1c1900
 [m3vpss ]  442: SYSTEM: Creating ListMP [VPSS-M3_IPC_IN_0] in region 0 ...
 [c6xdsp ]  40: SYSTEM: Creating ListMP [DSP_IPC_OUT_21] in region 0 ...
 [m3video]  440: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_20] in region 0 ...
 [m3vpss ]  442: SYSTEM: ListElem Shared Addr = 0xbf267880
 [c6xdsp ]  40: SYSTEM: Creating ListMP [DSP_IPC_IN_21] in region 0 ...
 [m3video]  441: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_20] in region 0 ...
 [m3vpss ]  445: SYSTEM: Creating ListMP [VPSS-M3_IPC_OUT_1] in region 0 ...
 [c6xdsp ]  40: SYSTEM: ListElem Shared Addr = 0xbf1e5180
 [m3video]  441: SYSTEM: ListElem Shared Addr = 0xbf244000
 [m3vpss ]  446: SYSTEM: Creating ListMP [VPSS-M3_IPC_IN_1] in region 0 ...
 [c6xdsp ]  41: SYSTEM: Creating ListMP [DSP_IPC_OUT_24] in region 0 ...
 [m3video]  445: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_21] in region 0 ...
 [m3vpss ]  446: SYSTEM: ListElem Shared Addr = 0xbf28e600
 [c6xdsp ]  41: SYSTEM: Creating ListMP [DSP_IPC_IN_24] in region 0 ...
 [m3video]  445: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_21] in region 0 ...
 [m3vpss ]  467: SYSTEM: Creating ListMP [VPSS-M3_IPC_OUT_19] iPHY: 0:14 - Link is Upn region 0 ...
 - 100/Full [c6xdsp ]  42: 
SYSTEM: ListElemADDRCONF(NETDEV_CHANGE): eth1: link becomes ready
 Shared Addr = 0xbf208a00
 [m3video]  445: SYSTEM: ListElem Shared Addr = 0xbf26b000
 [m3vpss ]  467: SYSTEM: Creating ListMP [VPSS-M3_IPC_IN_19] in region 0 ...
 [c6xdsp ]  42: SYSTEM: Creating ListMP [DSP_IPC_OUT_25] in region 0 ...
 [m3video]  465: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_24] in region 0 ...
 [m3vpss ]  467: SYSTEM: ListElem Shared Addr = 0xbf2af600
 [c6xdsp ]  43: SYSTEM: Creating ListMP [DSP_IPC_IN_25] in region 0 ...
 [m3video]  466: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_24] in region 0 ...
 [m3vpss ]  471: SYSTEM: Creating ListMP [VPSS-M3_IPC_OUT_20] in region 0 ...
 [c6xdsp ]  43: SYSTEM: ListElem Shared Addr = 0xbf226500
 [m3video]  466: SYSTEM: ListElem Shared Addr = 0xbf291b00
 [m3vpss ]  471: SYSTEM: Creating ListMP [VPSS-M3_IPC_IN_20] in region 0 ...
 [c6xdsp ] !!WARNING.Resource already registered:2
 [c6xdsp ]  42: SYSTEM  : Initializing Links !!! 
 [m3video]  469: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_25] in region 0 ...
 [m3vpss ]  471: SYSTEM: ListElem Shared Addr = 0xbf2f0980
 [m3video]  469: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_25] in region 0 ...
 [m3vpss ]  475: SYSTEM: Creating ListMP [VPSS-M3_IPC_OUT_21] in region 0 ...
 [c6xdsp ]  44: SYSTEM  : FREE SPACE : System Heap      = 6393472 B, Mbx = 10240 msgs) 
 [m3video]  470: SYSTEM: ListElem Shared Addr = 0xbf2d2e80
 [m3vpss ]  475: SYSTEM: Creating ListMP [VPSS-M3_IPC_IN_21] in region 0 ...
 [m3video]  472: HDVICP: Doing PRCM for IVAHD[0] ... 
 [m3vpss ]  476: SYSTEM: ListElem Shared Addr = 0xbf314200
 [c6xdsp ]  58: SYSTEM  : Initializing Links ... DONE !!! 
 [m3video]  472: HDVICP: PRCM for IVAHD[0] ... DONE.
 [m3vpss ]  478: SYSTEM : HDVPSS Drivers Version: HDVPSS_01_00_01_37
 [c6xdsp ] Remote Debug Shared Memory @ 0xbff00000
 [m3video] Remote Debug Shared Memory @ 0xbff05020
 [m3vpss ] Remote Debug Shared Memory @ 0xbff0a040
 [m3video]  474: UTILS: DMA: HWI Create for INT62 !!!
 [m3vpss ]  478: SYSTEM  : FVID2 Init in progress !!!
 [c6xdsp ]  58: SYSTEM  : System DSP Init Done !!!
 [m3video]  475: SYSTEM  : ISS Init in progress !!!
 [m3vpss ]  566: SYSTEM  : FVID2 Init in progress DONE !!!
 [m3video]  475: SYSTEM  : ISS Power-ON in progress !!!
 [m3vpss ]  566: SYSTEM  : Device Init in progress !!!
 [m3video]  485: SYSTEM  : ISS Power-ON in progress DONE !!!
 [m3video]  485: SYSTEM  : ISS Init in progress DONE !!!
 [m3vpss ] initPrms.isI2cInitReq = 0
 [m3video]  485: VCOP BOOST BIT is Set
 [m3video]  486: SYSTEM  : VCOP Init in progress !!!
 [m3vpss ] initPrms.isI2cInitReq = 0
 [m3video]  486: SYSTEM  : VCOP needs 172 B of memory !!!
 [m3vpss ]  668: SYSTEM  : Device Init in progress DONE !!!
 [m3video]  487: SYSTEM  : VCOP Init in progress DONE !!!
 [m3vpss ] 	HDVPSS Freq  : 220 MHz
 [m3video]  488: SYSTEM  : Initializing Links !!! 
 [m3vpss ] Received character 's'
 [m3video]  488: SYSTEM  : FREE SPACE : System Heap      = 6263296 B, Mbx = 10240 msgs) 
 [m3vpss ]  723: SYSTEM  : System VPSS Init Done !!!
 [m3vpss ]  724: UTILS: DMA: HWI Create for INT63 !!!
 [m3video]  488: SYSTEM  : FREE SPACE : SR0 Heap         = 5802880 B (5 MB) 
 [m3vpss ]  725: SYSTEM  : Initializing Links !!! 
 [c6xdsp ] Remote Debug Shared Memory @ 0xbff00000
 [m3video] Remote Debug Shared Memory @ 0xbff05020
 [m3vpss ] Remote Debug Shared Memory @ 0xbff0a040
 [m3video] Received character 's'
 [m3video]  488: SYSTEM  : FREE SPACE : Frame Buffer     = 385875840 B (367 MB) 
 [m3vpss ]  725: SYSTEM  : FREE SPACE : System Heap      = 250312 B, Mbx = 10240 msgs) 
 [c6xdsp ] Remote Debug Shared Memory @ 0xbff00000
 [m3video] Remote Debug Shared Memory @ 0xbff05020
 [m3vpss ] Remote Debug Shared Memory @ 0xbff0a040
 [c6xdsp ] Received character 's'
/opt/dvr_rdk/ti814x
 [m3video]  488: SYSTEM  : FREE SPACE : Bitstream Buffer = 74448768 B (70 MB) 
 [m3vpss ]  725: SYSTEM  : FREE SPACE : SR0 Heap         = 5802880 B (5 MB) 
 
 ORG 0x46c00524: 0
 NEW 0x46c00524: 2
 
 [m3video]  488: SYSTEM: Opening MsgQ [VPSS-M3_MSGQ] ...
 [m3vpss ]  726: SYSTEM  : FREE SPACE : Frame Buffer     = 381565824 B (363 MB) 
 [m3video]  489: SYSTEM  : FREE SPACE : Tiler 8-bit      = 89128960 B (85 MB)  - TILER ON 
 [m3vpss ]  726: SYSTEM  : FREE SPACE : Bitstream Buffer = 74448768 B (70 MB) 
 [m3video]  490: SYSTEM  : FREE SPACE : Tiler 16-bit     = 44040192 B (42 MB)  - TILER ON 
 [m3vpss ]  726: SYSTEM  : FREE SPACE : Tiler 8-bit      = 89128960 B (85 MB)  - TILER ON 
 [m3video]  564: SYSTEM  : Initializing Links ... DONE !!! 
 [m3vpss ]  726: SYSTEM  : FREE SPACE : Tiler 16-bit     = 44040192 B (42 MB)  - TILER ON 

 === Hello World START === !
 [ACL] usbeth_thread !
 [m3vpss ]  906: SYSTEM  : Initializing Links ... DONE !!! 

 === Hello World START === !
 enter facburn_thread thread 
 [m3vpss ]  906: SYSTEM  : Set Static L3 pressure for HDVPSS as High
/etc/init.d/S60local: line 6:   190 Segmentation fault      /root/libtest -5

CPSW phy found : id is : 0x3b1861
ADDRCONF(NETDEV_UP): eth1: link is not ready

Welcome to Buildroot
buildroot login: root
[root@buildroot ~]# PHY: 0:14 - Link is Up - 100/Full
ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready

[root@buildroot ~]# /opt/dvr_rdk/ti814x/bin/sys_pri.out --printAll
 
 L3 Static PreUnhandled fault: external abort on non-linefetch (0x1018) at 0x44401f08
ssure 
 ================== 
 A8       DSP_CFG  HDVPSS0  HDVPSS1  EDMA_RD2 EDMA_WR2 EDMA_RD3 EDMA_WR3 
 0        0        1        1        0        0        0        0       
 
 GMAC0    GMAC1    USB_DMA  USB_QMGR SATA     DUCATI   PCIE
 0        0        0        0        0        0        0       
 
 
 DMM Priority 
 ============ 
 A8       SYS_MMU  DUCATI   EDMA_RD0 EDMA_RD1 EDMA_RD2 EDMA_RD3 EDMA_WR0 
 4        4        0        4        4        4        4        4       
 
 EDMA_WR1 EDMA_WR2 EDMA_WR3 SGX      HDVICP0  HDVICP1  HDVICP2  GMAC0    
 4        4        4        4        2        4        4        4       
 
 GMAC1    USB_DMA  USB_QMGR SATA     PCIE
 4        4        4        4        4       
 
 
 L3 Bandwith Regulator 
 ===================== 
 Module   : PressH   PressL   Bandwidth in MB/s Watermark (Cycles) 
 HDVICP0  : 3        0        0.000             1 (32)
Bus error
[root@buildroot ~]#

0 Badri Narayanan over 11 years ago in reply to hb chen

TI__Guru 59700 points

There are 2 separate issues:

1. Occasional VIP overflow due to unknown reason.

2. VIP overflow when running DDR intensive task on A8 like iperf.

The second issue occurrence is reduced by setting EMIF PBBR as you mentioned indicating it is indeed due to DDR b/w.

The second issue is also less likely to occur on PG3.0 silicon revision due to better balancing of DMM requests between A8 and other initiator.

For the next run setting EMIF PBBPR to 0x10 instead of 0x20 and also comment out below line in init.sh

./bin/sys_pri.out --dmm-pri-set HDVICP0 2

There is nothing to indicate issue#1 and issue #2 are the same issue.For issue #1 Brijesh had provided suggestion for further debug .i.e Try disabling the VBI data channel , monitor for clock skew on VIP input.

0 Henry Wu1 over 11 years ago in reply to Badri Narayanan

Prodigy 70 points

Hi Badri,
CC HB,

We perform experiments as the suggestion, but we could still see the symptom twice in 20 minutes (please see the attached log).

(log: teratermbb.log, keywork: Overflow)
(log: teratermcc.log, keyword: Overflow, CAPTURE Statistics)
=> after overflow occurs, we print out some Statistics of M3. Please help to check.

8272.teratermbb.log
3618.teratermcc.log

For issue #1 Brijesh had provided suggestion for further debug (i.e Try disabling the VBI data channel , monitor for clock skew on VIP input).

1) We could not remove VBI data channel in our current program design.
2) We tried to duplicate overflow from "bad signal to VIP port", but the length/width of video will be incorrect.

Our current issue is "length/width of video are correct, but there is overflow". That seems not the clock skew on VIP input issue.

Thank you.

Henry Wu

0 SuitJune Young over 11 years ago in reply to Badri Narayanan

Genius 3985 points

DM8168 PG3.0,is there any docs related to describe it?

What type of problem it can help to solve?

0 Badri Narayanan over 11 years ago in reply to SuitJune Young

TI__Guru 59700 points

There is no PG 3 for 816x device.Last revision is 2.1. PG 3 exits only for 814x

0 hb chen over 11 years ago in reply to Badri Narayanan

Expert 2640 points

Dear Badri Narayanan,

We had tried PG3.0 (DM8148CCYE0 ) version, but "Overflow detected on VIP0" still happen.

I had applied following setting:

1) 0x4C000054: 00FFFF10

2) 0x4D000054: 00FFFF10

3) comment out below line in init.sh >> ./bin/sys_pri.out --dmm-pri-set HDVICP0 2

A8 CPU usage:100%

[m3vpss ] 1362873: LOAD: CPU: 33.0% HWI: 3.3%, SWI:2.8%

[m3video] 1363386: LOAD: CPU: 18.3% HWI: 1.4%, SWI:2.0%

[c6xdsp ] 1068650: LOAD: CPU: 18.3% HWI: 0.5%, SWI:0.3%

Do you have any other suggestion?

0 Brijesh Jadav over 11 years ago in reply to hb chen

TI__Guru**** 476575 points

Hi Chen,

Is there any chance of DDR reaching 100% bandwidth momentarily? Could you please check it?

There is a possibility of VIP overflow in case there is no bandwidth to write to memory

Regards,

Brijesh

0 hb chen over 11 years ago in reply to Brijesh Jadav

Expert 2640 points

Dear Brijesh,

Does TI provide some tools to monitor DDR bandwidth momentarily?

or What command can I use to check this issue on DM8148/Linux?

Thx ~

0 YL CUI over 9 years ago in reply to Henry Wu1

Prodigy 30 points

Henry，

I have no idea whre you found the section 1.2.8.19 VIP overflow detection and recovery.

I cannot find it int he newest verison of datasheet. coule you please send me a copy of your document with that? thanks!

cuiyuelei@outlook.com

0 Pavel Botev over 9 years ago in reply to YL CUI

TI__Guru**** 170625 points

YL CUI said:

I have no idea whre you found the section 1.2.8.19 VIP overflow detection and recovery.

I cannot find it int he newest verison of datasheet. coule you please send me a copy of your document with that? thanks!

This section is available in the DM814x HDVPSS document, which is under NDA and available through local TI FAE.

Regards,
Pavel

0 ranchu over 8 years ago in reply to Pavel Botev

Guru 20755 points

Hi Pavel,

I also have this overflow issue (DDR ?).
Is there some way to overcome it ?

Thank you!
Ran

Processors

Processors forum

rare case: "Overflow detected on VIP0"