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dsplink compilation using CCS

Other Parts Discussed in Thread: OMAP3530

 

hello

I have compiled the dsplink sample application (loop) using CCS. While loading this program following error occured. Plz help


[root@OMAP3EVM /mnt]# insmod dsplinkk.ko                                        
DSPLINK Module (1.63) created on Date: Dec 31 2009 Time: 14:36:33               
[root@OMAP3EVM /mnt]# mknod /dev/dsplink c 230 0                                
[root@OMAP3EVM /mnt]# cp dsplink.lib /lib/                                      
[root@OMAP3EVM /mnt]# ./loopgpp dsplin~1.out 1024 10                            
=============== Sample Application : LOOP ==========                            
==== Executing sample for DSP processor Id 0 ====                               
Entered LOOP_Create ()                                                          
Unable to handle kernel paging request at virtual address c8a11000              
pgd = c7c8c000                                                                  
[c8a11000] *pgd=87e0e011, *pte=000c1362, *ppte=01df6028                         
Internal error: Oops: 807 [#1]                                                  
Modules linked in: dsplinkk                                                     
CPU: 0    Not tainted  (2.6.22.18-omap3 #1)                                     
PC is at memcpy+0x50/0x330                                                      
LR is at 0x20c9ca2                                                              
pc : [<c0164470>]    lr : [<020c9ca2>]    psr: 20000013                         
sp : c6e27cec  ip : 02100264  fp : c6e27d14                                     
r10: bf01f414  r9 : 00000000  r8 : 02952264                                     
r7 : 00002000  r6 : 01bde2e4  r5 : 023da2e4  r4 : 02bdc2e4                      
r3 : 00002000  r2 : 00002fc0  r1 : c8ba6fa0  r0 : c8a11000                      
Flags: nzCv  IRQs on  FIQs on  Mode SVC_32  Segment user                        
Control: 00c5387f  Table: 87c8c018  DAC: 00000015                               
Process loopgpp (pid: 326, stack limit = 0xc6e262d8)                            
Stack: (0xc6e27cec to 0xc6e28000)                                               
7ce0:                            c8b96000 00013fe0 bf01f3e4 00013fe0 c8a00080   
7d00: 00000000 bf00f57c c6e27d34 c6e27d18 bf0006d4 bf00f578 00000000 87e00080   
7d20: 00000000 00000003 c6e27d4c c6e27d38 bf000274 bf000624 00013fe0 c8b96000   
7d40: c6e27d7c c6e27d50 bf002038 bf00023c c8b96000 bf00ec74 00008000 00013fe0   
7d60: c8b6b000 00000000 0000001b c6e27e80 c6e27e6c c6e27d80 bf00d698 bf001fd0   
7d80: c8b96000 c008b330 0000001a c8b96000 c7e4a560 bee3cb94 00000002 00000000   
7da0: 00000032 87e2b280 6f69622e 00000073 87e24060 87e24060 000047e0 00045ec9   
7dc0: 00000000 00000000 00000000 00000000 00000520 00000000 00017124 c8b6b000   
7de0: 7865742e 00000074 87e00080 87e00080 00013fe0 0004a6a9 00000000 00000000   
7e00: 00000000 00000000 00000520 00000000 c8b60001 c8b96000 6f69622e 00000073   
7e20: 00000000 7865742e 00000074 00000000 00000000 00000000 c6e27e24 00000001   
7e40: bf010318 bf01f198 00008000 c8878000 00000000 bf020d58 bee3ce51 bf020d64   
7e60: c6e27ed4 c6e27e70 bf012b28 bf00d110 bf020d64 c88c0480 bee3cb94 00000002   
7e80: c8b6b000 00000000 00000003 00000001 bf001fc4 bf001f90 00000002 bf01f1c4   
7ea0: bf01f1c4 bf01f198 00087ca2 00006c05 00008000 00000003 bee3cb34 c002af68   
7ec0: c6e26000 00000000 c6e27f3c c6e27ed8 bf013ed0 bf012980 c68b90d0 c0027a00   
7ee0: c6e27f0c c6e27ef0 c0097020 c0090bd8 c68b94b0 40972000 000844fb c68b90d0   
7f00: c6e27f74 00008000 00000000 bee3ce51 00000002 bee3cb94 00008000 00087f30   
7f20: 00006c05 bee3cb34 00000003 c3dba480 c6e27f54 c6e27f40 c00b16a0 bf013a30   
7f40: c3dba480 bee3cb34 c6e27f7c c6e27f58 c00b1910 c00b1644 c6e27f74 c6e27f68   
7f60: 00000003 bee3cb34 00006c05 c3dba480 c6e27fa4 c6e27f80 c00b1968 c00b16bc   
7f80: c6e26000 00000001 00000146 00000000 00000000 00000036 00000000 c6e27fa8   
7fa0: c002adc0 c00b1934 00000146 00000000 00000003 00006c05 bee3cb34 00000003   
7fc0: 00000146 00000000 00000000 00000036 00000000 00000000 40024000 bee3cb1c   
7fe0: 00000000 bee3ca08 0000c03c 400fc01c 20000010 00000003 4e050300 51060001   
Backtrace:                                                                      
[<bf00f56c>] (MEM_Copy+0x0/0x18 [dsplinkk]) from [<bf0006d4>] (OMAP3530_write+0)
[<bf000618>] (OMAP3530_write+0x0/0x104 [dsplinkk]) from [<bf000274>] (DSP_write)
 r7:00000003 r6:00000000 r5:87e00080 r4:00000000                                
[<bf000230>] (DSP_write+0x0/0x50 [dsplinkk]) from [<bf002038>] (LDRV_PROC_write)
[<bf001fc4>] (LDRV_PROC_write+0x0/0xbc [dsplinkk]) from [<bf00d698>] (COFF_load)
[<bf00d104>] (COFF_load+0x0/0x66c [dsplinkk]) from [<bf012b28>] (PMGR_PROC_load)
[<bf012974>] (PMGR_PROC_load+0x0/0x244 [dsplinkk]) from [<bf013ed0>] (DRV_Ioctl)
[<bf013a24>] (DRV_Ioctl+0x0/0x934 [dsplinkk]) from [<c00b16a0>] (do_ioctl+0x68/)
 r7:c3dba480 r6:00000003 r5:bee3cb34 r4:00006c05                                
[<c00b1638>] (do_ioctl+0x0/0x78) from [<c00b1910>] (vfs_ioctl+0x260/0x278)      
 r5:bee3cb34 r4:c3dba480                                                        
[<c00b16b0>] (vfs_ioctl+0x0/0x278) from [<c00b1968>] (sys_ioctl+0x40/0x64)      
 r7:c3dba480 r6:00006c05 r5:bee3cb34 r4:00000003                                
[<c00b1928>] (sys_ioctl+0x0/0x64) from [<c002adc0>] (ret_fast_syscall+0x0/0x2c)
 r7:00000036 r6:00000000 r5:00000000 r4:00000146                                
Code: f5d1f05c f5d1f07c e8b151f8 e2522020 (e8a051f8)                            
cccccc^[[3;3~^[[3~   

 

 

regards

satheesh                                                         

  • Sateesh,

     

    I have the following questions:

    1) Did you try running the loop sample with DSP executable built using DSPLink build system?

    2) The sample is crashing in PROC_load. I have a few suggestions here:

        a) Ensure that the mem variable set in Linux bootargs is correct and corresponds to DSPLink memory map

        b) Do a verbose build of loop sample using DSPLink build system to ensure that the compile options, flags that you have passed in CCS build are the same.

    Deepali

  • hai Deepali

    Thanks for replying

     I want to write an audio application using dsplink with GPP OS  linux-2.6.22 and omap3evm. I had  written a low level dsp application using ccs and loaded in omap3evm without linux. I am new in dsplink. plz give some doccument for integrating an audio application in omap3evm using dsplink. plz help..

     

    regards

    satheesh

  • deepali

    I have installed dsplink in omap3evm for arm dsp communication with gpp os linux. my aim is to loop back speech data read from codec device and compress with ower own algorithm.

    Data types used for data tansfer is signed int16. I edit the loop.c application for this purpose. while executing this application  following error is occured.

    loop.c: In function 'LOOP_Create':
    loop.c:348: warning: passing argument 3 of 'CHNL_allocateBuffer' from incompatible pointer type
    loop.c:360: warning: assignment from incompatible pointer type
    loop.c: In function 'LOOP_Execute':
    loop.c:400: warning: assignment from incompatible pointer type
    loop.c: In function 'LOOP_Delete':
    loop.c:511: warning: passing argument 3 of 'CHNL_freeBuffer' from incompatible pointer type.

    how can allocate a buffer with Int16 data types. Here CHNL_create, CHNL_allocateBuffer allocate char8 buffer.plz give necesasary information.

    changes done in existing program is

    STATIC Int16 * LOOP_Buffers [1] ;

    regards

    satheesh

     

     

  • Satheesh,

    The change that you have done will cause a build failure.The CHNL_allocate buffer allocates a buffer of type Character.

    For your use case, you can processing and consuming the Char* data as Int16 by typecasting it to Int16 while reading/writing into it.

    Deepali

  • hai deepali

    thanks for your help

    I have one more question. I have to run a soft codec in dsp. Here I am using loop sample application for data transfer. Our soft codec need 480 buffer size.While trying this buffer size ,application  goes to error.I think buffer allign size is 128 and will work only for that size ,I dont know.Plz give necessary infor mation for working this much buffer size.I am using omap3530 with os linux...plz

     

     

     

     

    regards

    satheesh

  • Satheesh,

    The shared memory needs to be aligned to Cache Line i.e. 128. Cache management API's on DSP work on cache aligned addresses. DSPLink mandates shared memory usage in cache aligned sizes.POOL API's fails if a non cache aligned address is passed.

    I would recommend  configuring POOL buffer for size 512 and using the first 480  bytes. Will that help?

    Deepali

  • hai deepali

    thanks for your help

    while I am trying LOOP_BufferSize=512 some audio data are missing .plz give any suggession to this issue..

    regards

    satheesh

  • Satheesh,

    Can you give some more input? Did the application work correctly before you made the change?

    Deepali

  • hai deepali

    thanks for replying

    I modified the loop sample application  for my audio data loop back. I have run the program by ./loopgpp loop.out 512 78 0. I think you are familiar with this application,512 for buffer size and 78 for number of iteration. while using this buffer size or other than 128 some amount of audio data are missing. how can I allocate buffer size of 512. I also tried with this way simply hard coded the buffer size like this

            size [0] = 512;
            poolAttrs.bufSizes      = (Uint32 *) &size ;

            poolAttrs.numBuffers    = (Uint32 *) &numBufs ;

            poolAttrs.numBufPools   = NUMBUFFERPOOLS ;

     

     

    plz help me.

  • Satheesh,

    Please see my comments inline:

    >> >>I also tried with this way simply hard coded the buffer size like this

    >> >>        size [0] = 512;

    [Deepali]: Just hard coding this value is not enough as multiple variables need to be set with the size. (The variable LOOP_BufferSize and strBufferSize). The above witll cause a problem as there will be incorrect size being used.

    >>I have run the program by ./loopgpp loop.out 512 78 0. I think you are familiar with this application,512 for buffer size and 78 for number of iteration. while using this buffer size or >> other than 128 some amount of audio data are missing.

    [Deepali]: Running the sample ./loopgpp loop.out 512 78 0 is correct. This will ensure the number 512 is used everywhere.

    Cache coherence of buffers passed through CHNL is taken care of internally by DSPLink. It could be some other problem related to cache. Are the MAR registers set? Or are you using default DSPLink memory map? Are you also doing any manipulation of the buffer? More details will help.

    Deepali

  • hai deepali

    My aim is to transfer 512 0r 256 byte of data between ARM and DSP.I modiifed the sample loop program.Buffer size is entered through command line.plz give infromation about  what are the modification  needed to assign 512 or 256 byte buffer size.

     

    thanks

    regards

    satheesh

  • hai deepali

    thanks for your reply

    I am using the defalt memory map providded with dsplink.

    regards

    satheesh

  • hai deepali

    thanks for your help

    My work in detail

    gpp side

    I have read PCM data file in filesystem to charecter buffer of size 30000 and read 128 byte from that buffer and issue it to channel throgh CHAL_Issue and loopbacked data is write in to another buffer and then to a file.It is sucessfully woking.while am trying with 512 some audio data are missing and there is no changes in dsp side and changes I have done is chnlAttrInput.endianism = Endianism_Little.There is no other change.

     

     

    regards

    satheesh

  • Satheesh,

    When you modify the buffer size to 512 via command line, 512 bytes are transferred between ARM and DSP. Cache coherence is also maintained internally by DSPLink.

    What other changes have you made in the application?

    Deepali

  • hai deepali

    thanks

    I have given the buffer size only through command line ./loopgpp loop.out 512 280 0.

     

     

     

    regards

    satheesh

  • Sathhesh,

    If you share your updated code, I can look through that to find the problem.

    Deepali

  • hai deepali

    Thank you very much

    I have solved that issue it was my mistake. we have also real time kernel Linux 2.6.22.1-rt and is successfully running on the our platform.How ca i integrate dsplink 1.63 to our preemptive kernel while I am trying to load this it make more errors. plz give necessary information regarding to this area. Plz.....

     

    thank for your support

    regards

    satheesh

     

  • Satheesh

    Please give details on the errors so that I can comment on them.

    Deepali

  • hai deepali

    thanks for your help

    While I am trying with latest version it works successfully .I have doubt whether a high priority task will preempt the dsplink application?

     

     

     

    regards

    satheesh

  • Satheesh,

    In the pre-emptible kernel, a high priority task can preempt a low priority task.

    The lower priority task could be running DSPLink. However, DSPLink code is written to ensure thread safe execution, if that is your concern.

    Deepali

  • hello deepali

    Thanks for your reply

    what you mean by thread safe execution? can you explain?

     

    regards

    satheesh

  • Satheesh,

    My point was that DSPLink works in a pre-emptive environment.

    Deepali

  • hai deepali

    thanks for your help

    I am have one problem.while I am integrating our algorithm which has some memory hard cording is needed. while I am  trying with some memory area(0x87e00180,87ef0180) following error is occurred. plz give any suggestion regarding this area.

    DSP MMU Error Fault!  MMU_IRQSTATUS = [0x1]. Virtual DSP addr reference that generated the interrupt = [0xffff0040].

     

     

     

     

    regards

    satheesh

  • Satheesh,

    Please look here:

    http://wiki.davincidsp.com/index.php/DSP_MMU_Faults

    Deepali

  • hai deepali

    thanks for your help

    I have compile installed linux kernel 2.6.22.1 (linux-2.6.22.1 from kernel.org+patch from muru+patch fro mistral+rt patch from kernel.org).In this case patching works sucessfully. while I am trying with linux-02.01.03.11(linux psp) and  patch-2.6.29.6-rt24 make more error. I follow the doccument from rt wikki. plz give any suggession regarding this area

     

     


    regards

    satheesh

     

  • Satheesh,

    I am not aware of Linux build error problems. Somebody else on community will have to help you.

    Deepali

     

  • hai deepali

    ok

    thanks for your help

    regards

    satheesh

  • hai deepali

    I cannot solve the mmu error.DSP MMU Error Fault!  MMU_IRQSTATUS = [0x1]. Virtual DSP addr reference that generated the interrupt = [0xffff0040].

    I need a one  physical memry location OX10f07100 for our algorithm.I have changed the TCF file and CFG_OMAP3530_SHMEM.c

    the changes are.

    STATIC LINKCFG_MemEntry  LINKCFG_memTable_00 [] =
    {
        {
            RSTENTRYID,                        /* ENTRY          : Entry number */
            "RESETCTRL",                       /* NAME           : Name of the memory region */
            RESETCTRLADDR,                     /* ADDRPHYS       : Physical address */
            RESETCTRLADDR,                     /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1u,                      /* ADDRGPPVIRT    : GPP virtual address (if known) */
            RESETCTRLSIZE,                     /* SIZE           : Size of the memory region */
            TRUE,                              /* SHARED         : Shared access memory? */
            FALSE,                             /* SYNCD          : Synchornized? */
        },
        {
            CODEENTRYID,                       /* ENTRY          : Entry number */
            "DDR2",                            /* NAME           : Name of the memory region */
            CODEMEMORYADDR,                    /* ADDRPHYS       : Physical address */
            CODEMEMORYADDR,                    /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1u,                      /* ADDRGPPVIRT    : GPP virtual address (if known) */
            CODEMEMORYSIZE,                    /* SIZE           : Size of the memory region */
            TRUE,                              /* SHARED         : Shared access memory? */
            FALSE,                             /* SYNCD          : Synchornized? */
        },
        {
            SHAREDENTRYID0,                   /* ENTRY          : Entry number */
            "DSPLINKMEM",                     /* NAME           : Name of the memory region */
            SHAREDMEMORYADDR0,                /* ADDRPHYS       : Physical address */
            SHAREDMEMORYADDR0,                /* ADDRDSPVIRT    : DSP virtual address */
           (Uint32) -1u,                      /* ADDRGPPVIRT    : GPP virtual address (if known) */
            SHAREDMEMORYSIZE0,                /* SIZE           : Size of the memory region */
            TRUE,                             /* SHARED         : Shared access memory? */
            FALSE,                            /* SYNCD          : Synchornized? */
        },
        {
            SHAREDENTRYID1,                   /* ENTRY          : Entry number */
            "DSPLINKMEM1",                    /* NAME           : Name of the memory region */
            SHAREDMEMORYADDR1,                /* ADDRPHYS       : Physical address */
            SHAREDMEMORYADDR1,                /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1u,                     /* ADDRGPPVIRT    : GPP virtual address (if known) */
            SHAREDMEMORYSIZE1,                /* SIZE           : Size of the memory region */
            TRUE,                             /* SHARED         : Shared access memory? */
            FALSE,                            /* SYNCD          : Synchornized? */
        },
        {
            POOLENTRYID,                       /* ENTRY          : Entry number */
            "POOLMEM",                         /* NAME           : Name of the memory region */
            POOLMEMORYADDR,                    /* ADDRPHYS       : Physical address */
            POOLMEMORYADDR,                    /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1u,                      /* ADDRGPPVIRT    : GPP virtual address (if known) */
            POOLMEMORYSIZE,                    /* SIZE           : Size of the memory region */
            TRUE,                              /* SHARED         : Shared access memory? Logically */
            FALSE,                             /* SYNCD          : Synchornized? */
        },
        {
            5,                     /* ENTRY          : Entry number */
            "DSPIRAM",             /* NAME           : Name of the memory region */
            0x5c7f8000,            /* ADDRPHYS       : Physical address */
            0x107f8000,            /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
            0x00018000,            /* SIZE           : Size of the memory region */
            TRUE,                  /* SHARED         : Shared access memory? */
            FALSE                  /* SYNCD          : Synchornized? */
        },
        {
            6,                     /* ENTRY          : Entry number */
            "DSPL1PRAM",           /* NAME           : Name of the memory region */
            0x5cE00000,            /* ADDRPHYS       : Physical address */
            0x10E00000,            /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
            0x00008000,            /* SIZE           : Size of the memory region */
            TRUE,                  /* SHARED         : Shared access memory? */
            FALSE                  /* SYNCD          : Synchornized? */
        },
        {
            7,                     /* ENTRY          : Entry number */
            "DSPL1DRAM",           /* NAME           : Name of the memory region */
            0x5cF04000,            /* ADDRPHYS       : Physical address */
            0x10F04000,            /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
            0x00003000,            /* SIZE           : Size of the memory region */
            TRUE,                  /* SHARED         : Shared access memory? */
            FALSE                  /* SYNCD          : Synchornized? */
        },
        {
        8,
        "MYDATA",
        0x5cF07000,
        0x10F07000,
        (Uint32)-1,
        0x00001000,
        TRUE,
        FALSE
        },
        {

            9,                     /* ENTRY          : Entry number */
            "L4_CORE",             /* NAME           : Name of the memory region */
            0x48000000,            /* ADDRPHYS       : Physical address */
            0x48000000,            /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
            0x01000000,            /* SIZE           : Size of the memory region */
            FALSE,                 /* SHARED         : Shared access memory? */
            FALSE                  /* SYNCD          : Synchornized? */
        },
        {
            10,                     /* ENTRY          : Entry number */
            "L4_PER",              /* NAME           : Name of the memory region */
            0x49000000,            /* ADDRPHYS       : Physical address */
            0x49000000,            /* ADDRDSPVIRT    : DSP virtual address */
            (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
            0x00100000,            /* SIZE           : Size of the memory region */
            FALSE,                 /* SHARED         : Shared access memory? */
            FALSE                  /* SYNCD          : Synchornized? */
        }
    } ;

    and corresponding tcf file is

     

    * Load generic DSP/BIOS Link configuration

    * ============================================================================

    */

    utils.importFile("dsplink-omap3530-base.tci");

    utils.importFile("dsplink-iom.tci");

    utils.importFile("dsplink-zcpydata-swi.tci");

    utils.importFile("dsplink-dio.tci");

    utils.importFile("loop.tci");

     

    /* ============================================================================

    * Set all code and data sections to use DDR2

    * ============================================================================

    */

    bios.setMemCodeSections(prog, DDR2) ;

    bios.setMemDataNoHeapSections(prog, DDR2) ;

    bios.setMemDataHeapSections(prog, DDR2) ;

     

    /* ============================================================================

    * MEM : Global

    * ============================================================================

    */

    prog.module("MEM").BIOSOBJSEG = DDR2 ;

    prog.module("MEM").MALLOCSEG = DDR2 ;

     

    /* ============================================================================

    * TSK : Global

    * ============================================================================

    */

    prog.module("TSK").STACKSEG = DDR2 ;

     

    /* ============================================================================

    * Generate cdb file...

    * ============================================================================

    */

    if (config.hasReportedError == false) {

     

    bios.MEM.create("MYDATA");

    bios.MEM.instance("L1DSRAM").len = 0x00003000;

    bios.MEM.instance("MYDATA").base = 0x10f07000;

    bios.MEM.instance("MYDATA").len = 0x00001000;

    bios.MEM.instance("MYDATA").createHeap = 0;

    // !GRAPHICAL_CONFIG_TOOL_SCRIPT_INSERT_POINT!

     

    prog.gen();

    }

    what are modification needed to access the physical address.plz give any suggestion to this area.

     

     

     

    regards

    satheesh

  • Satheesh,

    The addresses that you are trying to map are fro IVA 2 sub system.

    Can you explain why you are doing that? Also, why is ADDRDSPVIRT different from ADDRPHYS field? It should be the same.

    Deepali

  • hai deepali

    thanks for replying

    our algorithm check the overflow status.we use physical memory address (its assembly file) for this checking overflow. Its successfully works on omap without linux (looping program without linux with low level codec driver program and loaded though jtag). I like integrate this program in linux though dsplink.For that purpose first i want to establish a audio data loop backing though dsplink. check with pcm data file(with out algorithm for compression) and algorithm need a physical address check. algorithm simply a c code with this overflow checking.while integrating this algorithm mmu error that i already mentioned will get. wether tcf memory edit only required for this purpose?. what are modification needed for implementing our requirement.how include one dsp physical address that will not make any conflict.

     

     

     

     

    regards

    satheesh

  • hai deepali

    plz give any suggestion to above issue

    thanks for your help

    regards

    satheesh

  • Satheesh,

    Can you ensure ADDRDSPVIRT and ADDRPHYS are same. Please give the physical address as per specs for the memory entry. Can you try after this change?

    Deepali