EMUx pins trace functions

Primoz Alic

Prodigy 190 points

I posted this in OMAP forums... maybe here is a better place.

What TRACE functions have EMUx pins on TI devices?

I'm specifically asking for AM335x device where EMU0 through EMU4 are available.

Are those EMU0: TCLK and EMU[1:4]: TDATA[0:3]?

Furthermore, are those standard functions where only 5 trace pins are available?

over 11 years ago

0 Biser Gatchev-XID over 11 years ago

TI__Guru**** 393215 points

The AM335X debug subsystem is described in section 27 of the AM335X Technical Reference Manual.

0 Matthijs van Duin over 11 years ago in reply to Biser Gatchev-XID

Mastermind 8040 points

The debug chapter of the public TRM for am335x contains a negligable amount of information.

Unfortunately TI seems to be very fussy about information on the debug capabilities of their chips. I've been interested in making my own debugger software and I've had to puzzle together the necessary information from many different sources and experiments. (e.g. I've been fortunate enough to find a register summary of the ICEPick-C, but it still lacks explanation of various settings and I haven't found one yet of the ICEPick-D.)

0 Biser Gatchev-XID over 11 years ago in reply to Matthijs van Duin

TI__Guru**** 393215 points

Perhaps you should contact your nearest TI representative - some information is only disclosed under NDA.

0 Primoz Alic over 11 years ago in reply to Biser Gatchev-XID

Prodigy 190 points

Is this that kind of data then?

0 Biser Gatchev-XID over 11 years ago in reply to Primoz Alic

TI__Guru**** 393215 points

Sorry, I was replying to the previous post. The EMU pin functions are given in Table 27-1. There is also an wiki article here: http://processors.wiki.ti.com/index.php/AM335x_Trace, but it only basically outlines the steps necessary to set up a trace environment.

0 Matthijs van Duin over 11 years ago in reply to Biser Gatchev-XID

Mastermind 8040 points

I'm not interested in receiving information under NDA, I wish to retain the ability to speak freely and to distribute my source code if I want to. Debug and trace are important features of a processor, and open information would hopefully contribute to the development of better tools that make use of them.

0 Matthijs van Duin over 11 years ago in reply to Biser Gatchev-XID

Mastermind 8040 points

Biser Gatchev-XID said:

Sorry, I was replying to the previous post. The EMU pin functions are given in Table 27-1. There is also an wiki article here: http://processors.wiki.ti.com/index.php/AM335x_Trace, but it only basically outlines the steps necessary to set up a trace environment.

It describes trace using the ETB, not using the trace pins. If the am335x is sufficiently similar to the dm814x and dm816x, it lacks a TPIU and the coresight trace funnel only connects to the ETB. External trace via the EMU pins is then only supported by the MIPI STM (system trace module) which collects trace messages from software and from various hardware sources (such as the OCP-WP).

Hardware trace uses EMU2 as trace clock, and the remaining four EMU pins for trace data. 2-bit trace is also possible, in which case EMU3 and 4 are trace data while EMU0 and EMU1 can be used as trigger in/outputs.

0 Primoz Alic over 11 years ago in reply to Biser Gatchev-XID

Prodigy 190 points

Trace guide is made for ETB only. Since there is a TPIU and 5 pins dedicated for trace I assume they are as specified on standard 20pin Cortex debug conector (by ARM). In the table you refer to just says "Trace port" for EMU pins. I can nowhere find the info which is which. And if that mapping is standard.

0 Matthijs van Duin over 11 years ago in reply to Primoz Alic

Mastermind 8040 points

Primoz Alic said:

Trace guide is made for ETB only. Since there is a TPIU and 5 pins dedicated for trace I assume they are as specified on standard 20pin Cortex debug conector (by ARM). In the table you refer to just says "Trace port" for EMU pins. I can nowhere find the info which is which. And if that mapping is standard.

TI processors aren't really compatible with plain ARM CoreSight debug/trace. Tools need to be aware of TI-proprietary aspects such as ICEPick and DRM. For that reason I would recommend using the TI-specific debug/trace connector rather than the ARM standard connector.

See http://processors.wiki.ti.com/index.php/JTAG_Connectors

0 Primoz Alic over 11 years ago in reply to Matthijs van Duin

Prodigy 190 points

Don't I know it!

Thanks.

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EMUx pins trace functions