Hello, i have a problem with USB interrupts on DM6467t.
I have used a lot of interrups through GPIO (ethernet ontroller, FPGA and others), but now i need to use internal USB controller.
My interrups configured as:
AINTC->INTCTL = 0x4;
AINTC->EABASE = 0x0;
AINTC->EINT0 = 0x6000; //usb + usb dma
AINTC->EINT1 = 0x000E0000; //fpga,ethernet,mec
AINTC->FIQ0 = 0xFFFFFFFF;
AINTC->FIQ1 = 0xFFFFFFFF;
AINTC->IRQ0 = 0xFFFFFFFF;
AINTC->IRQ1 = 0xFFFFFFFF;
GPIO->BINTEN = 0x00000001;
GPIO->SET_RIS_TRIG01 = 0x0000000E;
My USB controller configured in 480 mbps peripherial mode:
SYSTEM->PINMUX[0] &= 0x7FFFFFFF; // Configure DRVVBUS Pin (PINMUX0[USB_DRVVBUS=bit31])to be used for USB (shard with GP22)
SYSTEM->VDD3P3V_PWDN = 0x080000c0; // Power Up I/o cell USB DRVVBUS[bit28] Pin 0/1=>powered/not-powered
SYSTEM->CLKCTL &= 0xFCFFFFFF; // Ext Crystal used: Enable on-chip Osc.
SYSTEM->CLKCTL |= 0x01000000; // Ext Clock source used: Disable on-chip Osc.
// Release the USB Controller from reset
usbRegs->CTRLR |= 0x0001;
usbRegs->CTRLR |= 0x0008; // non-PDR mode
SYSTEM->USB_CTL = 0x00070000; // USBID=1 (set controller to operate as peripheral)
// Enable interrupts at controller level
usbRegs->INTRUSBE = 0xFF; // Enable all USB interrupts in MUSBMHDRC; enable all Core Interrupts
usbRegs->INTMSKSETR = 0xFFFFFFFF; // Enable PDR2.0 USB Core Interrupts that capture Bus Conditions and more (all Interrupts -except DMA- are Enabled)
// Enable interrupts at core level
usbRegs->INTRTXE = 0x1F; // Enable All Core Tx Endpoints Interrupts + EP0 Tx/Rx interrupt
usbRegs->INTRRXE = 0x1E; // Enable All Core Rx Endpoints Interrupts
// Peripheral will operate at high speed
// usbRegs->POWER = 0x20; //usbRegs->POWER.USB_POWER_HSEN = 1;
// Enable SUSPENDM so that suspend can be seen UTMI signal
usbRegs->POWER =0x61;
//Clear all pending interrupts
usbRegs->INTCLRR = usbRegs->INTSRCR;
// Start a session
*((int*)(0x01C64460)) = 0x1; //usbRegs->DEVCTL.USB_DEVCTL_SESSION=1;
After that, my USB controller operates fine, there is data exchange between PC and USB controller, FIFO data is constatly changes, frame counter increments too, interrupt register values changes correctly, but there are no interrups in ARM core form USB (GPIO interrupts work fine).
If i configure USB in non-PDR mode, INTSRCR register is always zero (0x00000000), and INTRUSB register contains valid information about controller state.
If i configure USB in PDR mode, INTSRCR register contains valid information too, but there are no interrups in both cases.
Where is my problem ? Why ARM core doesnt see USB interrupts ?