Hi!
the KeyStone II Architecture DDR3 Memory Controller User Guide states that DDR3 components shall comply with JEDEC JESD79-3C.
This spec contains 8Gbit components with just one rank / one Chip-Select line, but the TI documentation only describes how to connect maximum 4Gbit components.
Now we just got the information from one of our customers that he tried a 16 Gigabyte ECC SO-DIMM (dual rank) made of 18 pcs 8Gbit (single-rank) components on a TI Keystone II based system and it seems working fine on it. This is the link: http://www.intelligentmemory.com/dram-modules/dram-modules.php?tab=02
I wonder if TI will add the support for such parts officially to the documentation? I heard that Micron and other manufacturers are planning to release such devices end of 2014 or early 2015. The 8G components and 16GB modules from IM seem to be still in sampling stage now.
So far, I have not had the chance to try these chips/modules on the Keystone or other TI platforms, but the capacity opens up some interesting new possibilities.
