Has the Double Data Rate bug been fixed in the latest rev silicon?
I.E is DDR mode supported for use with eMMC parts that support DDR?
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Has the Double Data Rate bug been fixed in the latest rev silicon?
I.E is DDR mode supported for use with eMMC parts that support DDR?
DDR support was never planned on AM335x. So this is not considered a bug.
The MMC module used in AM335x was designed to support this mode of operation, but there has never been any plans to support this mode in AM335x. Table 18-1 in the AM335x TRM is inserted to define device specific limitations while the remainder of the chapter is common to other TI devices. Since this was never planned, the design team did not close timing of internal circuits and IO signals as required to support this mode of operation.
There are no plans to support this mode of operation.
Regards,
Paul