dec channel create tilerEnable set

If you are going to dynamically delete and create decode channel you should set tilerEnable = FALSE .i.e If you are going to do Vdec_create/Vdec_delete. Else you can use tilerEnable = TRUE. Enabling tiler will improve performance.,

like you said that tilerEnable = TRUE can improve performance,so why when dynamically delete and create dec channel can not set it to be TRUE?

Because tiler memory is 2D and is more prone to fragmentation and you will run out of memory if you repeatedly delete and create decoder channels in tiled memory configuration

now i have a error ,if i have set tilerEnable = FALSE ,i do the vcap_venc_vdec_vdis loop

i have 2 enc channel and 16 dec channel .i send the enc data to dec channel 0 ,wait for 20 .then send the enc data to dec channel 1 , ...... to channel 2 . it will have following errror:

Disable Channel: 0
Close Channel: 2

IPCBITS Close Channel: 2

[host]
63979: IPCBITSOUT:Link[30000018]:
[host] Flush Frame Sent for chId[2] [m3video] DEC : Delete CH2, Dummy Object queued !!!
[m3video] DEC : Delete CH2 Got the Dummy Object queued !!!
[m3video] 74655: DECODE: CH2: Decoder flush needed (0)!!!
[m3video] 74655: DECODE: CH2: Decoder Flushing !!!

[host]
63997: IPCBITSOUT:Link[30000018]:
[host] Flush Frame Received for chId[2]
[host] IPC_BITSOUT:BitBuffer Free.chID:2,Size:0x1FA400
[host] ******* RingBuf 2 deleted ********

[host]
63999: IPCBITSOUT:Link[30000018]:
[host] Ch buffer delete completed for chId[2].Total Time[20]New resolution for CH 2 is 1920 x 1080

====================

Open Channel: 2
[m3video] 74660: IPCBITSIN:Link[1000001a]:
[m3video] Flush Frame received for ch[2]
[m3video] 74660: DECODE: CH2:
[m3video] Queing flush Frame to processQ
[m3video] 74660: DECODE: CH2:
[m3video] Flush Frame Received in ProcessQue
[m3video] 74663: DECODE: CH2:
[m3video] Freeing flush Frame
[m3video] 74663: IPCBITSIN:Link[1000001a]:
[m3video] Flush Frame freed for ch[2]
[m3video] DECLINK_H264:HEAPID:0 USED:2368
[m3video] DECLINK_H264:HEAPID:3 USED:9363456

---------vdecCrePrm->chMaxReqBufSize;-------2073600-- status=0-

---------ipcBufCreateParams.chMaxReqBufSize-------2073600---

[host]
******* RingBuf 4 created ********

[host] IPCBITSOUTLINK:Translated Addr Virt:0x480fc480 To Phy:0x96da5480
[host]
###Bit buff of size from the SR # 1 : 10368000 / bufsize 2073600, maxQueueDepth 50

[host] ###Bit buff BasePtr: 480FC480 / PhyAddr 96DA5480
ASSERT (ipcBitsOutLink_tsk.c|IpcBitsOutLink_doChBufCreate|948)
[m3video] 74842: DECODE: Creating CH2 of 1920 x 1080 [PROGRESSIVE] [NON-TILED ],target bitrate = 4000 Kbps ...
[m3video] 74842: DECODE: CH2: Decoder Create CH done!!!
^C

Pls check if this patch resolves the issue

------------- mcfw/src_linux/links/ipcBitsOut/ipcBitsOutLink_tsk.c ------------
diff --git a/mcfw/src_linux/links/ipcBitsOut/ipcBitsOutLink_tsk.c b/mcfw/src_linux/links/ipcBitsOut/ipcBitsOutLink_tsk.c
index 57c4f68..4728fd5 100755
--- a/mcfw/src_linux/links/ipcBitsOut/ipcBitsOutLink_tsk.c
+++ b/mcfw/src_linux/links/ipcBitsOut/ipcBitsOutLink_tsk.c
@@ -928,15 +928,6 @@
             SYSTEM_IPC_BITS_SET_BUFOWNERPROCID(listElem->bufState);
             SYSTEM_IPC_BITS_SET_BUFSTATE(listElem->bufState,
                                      IPC_BITBUF_STATE_FREE);
-            listElem->bitBuf.addr =
-                (Ptr) (((UInt32) (pObj->bitBufBasePtr[chId])) +
-                       (bufSize * bufId));
-            if (pObj->bitBufPhyAddr[chId])
-            {
-                listElem->bitBuf.phyAddr =
-                    (UInt32) ((UInt32) (pObj->bitBufPhyAddr[chId]) +  (bufSize * bufId));
-            }
-
 
             listElem->bitBuf.allocPoolID = chId;
             listElem->bitBuf.bufSize = bufSize;
@@ -948,9 +939,7 @@
             listElem->bitBuf.bottomFieldBitBufSize = 0;
             listElem->bitBuf.doNotDisplay = FALSE;
             listElem->bitBuf.inputFileChanged = FALSE;
-            listElem->srBufPtr = SharedRegion_getSRPtr(listElem->bitBuf.addr,
-                                                       srIndex);
-            OSA_assert(listElem->srBufPtr != IPC_LINK_INVALID_SRPTR);
+
             status =
                 OSA_quePut(&pObj->listElemQue[chId], (Int32) listElem,
                            OSA_TIMEOUT_NONE);

my source code is just following:

SYSTEM_IPC_BITS_SET_BUFOWNERPROCID(listElem->bufState);
SYSTEM_IPC_BITS_SET_BUFSTATE(listElem->bufState,
IPC_BITBUF_STATE_FREE);
listElem->bitBuf.addr =
(Ptr) (((UInt32) (pObj->bitBufBasePtr[chId])) +
(bufSize * bufId));
if (pObj->bitBufPhyAddr[chId])
{
listElem->bitBuf.phyAddr =
(UInt32) ((UInt32) (pObj->bitBufPhyAddr[chId]) + (bufSize * bufId));
}

listElem->bitBuf.allocPoolID = chId;
listElem->bitBuf.bufSize = bufSize;
/*listElem->bitBuf.fillLength = 0;
listElem->bitBuf.mvDataFilledSize = 0;
listElem->bitBuf.temporalId = 0;
listElem->bitBuf.numTemporalLayerSetInCodec = 0;
listElem->bitBuf.startOffset = 0;*/
listElem->bitBuf.bottomFieldBitBufSize = 0;
listElem->bitBuf.doNotDisplay = FALSE;
listElem->bitBuf.inputFileChanged = FALSE;
listElem->srBufPtr = SharedRegion_getSRPtr(listElem->bitBuf.addr,
srIndex);
OSA_assert(listElem->srBufPtr != IPC_LINK_INVALID_SRPTR);
status =
OSA_quePut(&pObj->listElemQue[chId], (Int32) listElem,
OSA_TIMEOUT_NONE);
//OSA_assert(status == OSA_SOK);

i have note the above more code ,but still have the above error.so how can i do?

whether you mean i have to note the above red color code?

but if i set the tilerEnable = TRUE that will not have the error? so why