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Idle / disconnected Hyperlink bus VDDT1 current draw

Bill Argabright
Intellectual 270 points
Other Parts Discussed in Thread: UCD9222, UCD7242

I need to know what the maximum current draw of VDDT1 is when the Hyperlink bus is disconnected (or idle).

In another post I found, I saw a table for the C6657 (VDDT1 is 65mA max), but this is maximum operating current... I need maximum idle current.

A little background here - we accidentally used a 3.5mil trace to connect the filtered power to the seven (7) VDDT1 pins of the C6678.  I need to know if we're going to burn up this tiny trace even though we aren't actually using Hyperlink.

Thanks!

-Bill

  • 0
    TI__Mastermind 42545 points

    Hi Bill,

    I'm afraid I don't really have an answer for you. The VDDT powers an internal linear supply so there will always be current flowing, even when the Hyperlink is not in use. We don't measure the minimum current for VDDT1. Since we don't require the filter if the interface isn't in use this information hasn't been needed.

    Regards, Bill

  • 0
    TI__Intellectual 1310 points

    Hi Bill,

    As you said, the maximum current draw for VDDT1 is 65mA @ 1V (for both the '6657 as well as the '6678) during operation. At that low of a current draw, a 3.5mil trace is more than enough. I know you won't be using the peripheral, but the idle currents should be lower than the operating currents. So if it's safe for normal operation, it follows that it is safe for idle.

    I know from an offline conversation that you are also concerned about AVDDAx and VDDRx, and both of those should be fine as well with those trace widths, with plenty of a safety factor. None of these are high-current supplies.

    Thanks,

    Ian

  • 0 in reply to Ian Cathey
    Intellectual 270 points

    Thanks, Ian.  Now the bigger issue with all of this is signal integrity.  Along with having fairly long (~1in), thin (3.5mil) traces to these power pins, the decoupling cap was also placed ~1in away.  Combined with the higher inductance of the thing 3.5 mil trace width, there's a concern that the signals powered by these signals will have SI issues.

    Here's a list of the pins that concern us:

    Pin Name Pin Function AVG Current Potential Resolution
    AVDDA1 SYS_CLK PLL Power Supply 50mA max Solder a 0.01uF (?) decoupling cap at each pin.
    AVDDA2 DDR_CLK PLL Power Supply
    AVDDA3 PASS_CLK PLL Power Supply
    VDDR2 PCIe SerDes Supply
    VDDR3 SGMII SerDes Supply
    VDDR4 SRIO SerDes Supply

    So we're hoping to find out:

    1) Will the signals that are powered by these pins (internal clocks, DDR3 signals, PCIe link, SGMII link, SRIO link) be operable?  eg. Will the DM8168 that's connected to this C6678's PCIe bus be able to communicate with it?  Will the DDR3 memory operate?

    2) Does it get any better if we do our post-assembly "fix" and solder a decoupling cap at each of these pins?

    3) Do you have a method to simulate any of this?  We don't know the internals of the parts, so it is very difficult for us to simulate.

    Also know that this is an alpha-level prototype - we certainly will fix this in the next spin, but we would like some good confidence things will work (or not), so we can better evaluate what our next steps are.

    Thanks!
    -Bill

  • 0 in reply to Bill Argabright
    TI__Expert 3740 points

    Bill (TI),

    Do you have enough information to solve these questions?

     

    Thanks!

    Janice

  • 0 in reply to Bill Argabright
    TI__Mastermind 42545 points

    Hi Bill,

    I'm very concerned about these connections. We've seen problems with unstable system and DDR clocks with bad connections to the AVDDA1 and AVDDA2. Decoupling close to the pin will help but you may still see problems when you transition from bypass to a higher frequency. We don't have any means of simulating your environment. You may be able to use these boards for code development but I would not recommend proceeding with with any serious testing without fixing this issue.

    Regards, Bill

  • 0 in reply to Bill Taboada
    Intellectual 270 points

    Bill,

    We're planning to do code development level activities only on these boards.  We will be fixing this in our next (Beta) spin.

    We'll know in a few weeks if the boards work as-is or not... I'll try to remember to update this thread with the answer.

    Thanks!

    -Bill

  • 0 in reply to Bill Argabright
    Intellectual 270 points

    Wanted to give an update to this.  The first board spin worked, but at a lower speed than desired, despite the really thin power traces.  We had to attach some extra decoupling caps to the lines, too.

    We're in the middle of testing the next board spin right now (with thicker, better power traces and decoupling), and we don't seem to be having any issues due to those nets anymore.

    -Bill

  • 0 in reply to Bill Argabright
    TI__Mastermind 42545 points

    Hi Bill,

    I'm glad the board is working now. Is it working at the faster speed?

    Regards, Bill

  • 0 in reply to Bill Taboada
    Intellectual 270 points

    We haven't gone all the way through the testing just yet, but I would imagine it will work.  Other things have come up to trip us up like a strange issue with the UCD9222 + UCD7242 supply.  These supplies haven't changed at all since our last spin, yet now they're behaving strangely.  I assume that would be a new topic if we wanted to / are able to enlist TI's help?

    -Bill

  • 0 in reply to Bill Argabright
    TI__Mastermind 42545 points

    Bill,

    Yes, that would be a new topic. We will try to help you here but we may have to pull in the power supply experts. 

    Regards, Bill