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TI81XX PM SUSPEND RESUME

Steven Weng1
Expert 2200 points

Hi All,

Refer to TI81XX PM SUSPEND RESUME User guide

(http://processors.wiki.ti.com/index.php/TI81XX_PSP_PM_SUSPEND_RESUME_User_Guide)

In the suspend mode, DDR will enter SelfRefresh state to jump to OCMC. The following descriptions:

Lowest 1 KB(1024 Bytes from the end) of OCMC RAM is used by Suspend code to execute from OCMC when DDR is placed in Self-refresh mode during suspend/resume.This memory area will be over-written by Suspend code when kernel is loaded, during SRAM initialization so drivers should avoid using the lowest 1KB of OCMC RAM

What is "Suspend code"? Where is it? In kernel source code?

BTW, There are two ways to wake-up from suspend mode: UART and TIMER.

Is it possible to add other ways to wake-up? Such as wake on lan?

Any helps will be appreciate!

Thanks!

BR

Steven

 

  • 0
    Guru 31670 points

    Hi Steven,

    You can see reference implementation in the file arch/arm/mach-omap2/sleep814x.S

  • 0 in reply to Renjith Thomas
    Expert 2200 points

    Hi Renjith,

    Thank for your reply!

    Could you know where's "suspend code" ?

    Is it possible to implement some functions in the suspend code?

    Thank you.

    BR

    Steven

  • 0 in reply to Steven Weng1
    Guru 31670 points

    Steven,

    I've mentioned the file name in my previous post. 

     arch/arm/mach-omap2/sleep814x.S

    Steven Weng1 said:
    Is it possible to implement some functions in the suspend code?

    You should be able to customize it.

  • 0 in reply to Renjith Thomas
    Expert 2200 points

    Hi Renjith Thomas,

    Thanks a lot.

    I have tried to implement  the suspend mode in the dm8168 board.It is difficult to debug when kernel crashing. I met some problem wish you could give some suggestions. Any helps will be highly appreciate!!

    1) As I know, the suspend code is loaded in last 1KB of OCMC sram in ti814x after kernel loaded. I found the following function  omap_sram_init() -> omap_sram_init()  will push the suspend code to ocmc sram. But I dont know the following defined...

    #define TI814X_SRAM_PA        0x402F1000

    #define TI814X_SRAM_VA        0xfe400000

    It should be  OCMC 0 physical address and virtual address ? I could find the physical address in ti816x is 0x40300000.Where the virtual address is defined? BTW, the suspend code size is limited to 1KB? is it possible to increase?

    2) From http://processors.wiki.ti.com/index.php/TI81XX_PSP_PM_SUSPEND_RESUME_User_Guide

    suspend sequence:

    1. check if timer is set
    2. Set Power domains state to OFF based on a flag - PDs with no clk activity will be turned off.
    3. Enter DDR SelfRefresh state - Jump to OCMC
    4. Gate DDR PHY clocks, Bypass DDR PLL
    5. If DeepSleep is enabled - enter Deepsleep
    6. Else WFI (ARM/A8 cpu waits for Interrupt)

    How could I do in step 2 and 4 in dm8168? Could you give some clues?

    Thanks in advance.

    BR

    Steven

  • 0 in reply to Steven Weng1
    Guru 31670 points

    Hi Steven,

    Sorry for my delayed response. 

    Steven Weng1 said:
    It should be  OCMC 0 physical address and virtual address ? I could find the physical address in ti816x is 0x40300000.Where the virtual address is defined? BTW, the suspend code size is limited to 1KB? is it possible to increase?

    The address corresponds to other OCMC bank I believe. Also the virtual address could be statically mapped to the physical region. I need to see the code to comment in detail.

    Steven Weng1 said:
    Set Power domains state to OFF based on a flag - PDs with no clk activity will be turned off.

    Steven Weng1 said:
    Gate DDR PHY clocks, Bypass DDR PLL

    You can check the PRCM part of the DM8168 TRM for the same.