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About operating specifications of pin B18 (VCLK/GIO79) in DM368

Hidekazu
Intellectual 880 points

Hi Expert

I can understand as follows from the manual, such as specification of pin B18 (VCLK/GIO79).

The following conditions:
--------------------------------------
During the reset : input(Without PD)

After reset release : VCLK

Pin internal PD does not exist
--------------------------------------

The custom board, we have 10KPU the B18 pin, but the intermediate potential was observed when it is confirmed PIN.

Because it has been input, the PD no state would otherwise, and we look forward to High resistance by PU.

It seems to operate internal PD, such as if they were present during the reset, but why do they behave like this?

Best Regards

Hidekazu

  • 0
    TI__Mastermind 49311 points

    Hidekazu,

       Please take a close look at its datasheet for chapter 3.8.1 Pullup/Pulldown Resistors, there are answers for your questions. There could be some error when datasheet indicate some pins for PU or PD, but this chapter has good information for how to handle this situation. 

    Thanks!

     Phil

  • 0 in reply to Phil Yi
    Intellectual 880 points

    Hi phil,

    Thank you for reply comment.

    It is not the answer I want to know.
    I want to know why, rather than deal with the process according to the data sheet, this phenomenon has occurred in the GPIO79.


    Best Regards

    Hidekazu