How to remap or reconfigure HDMI data and clock lanes of OMAP4470?

Hi Maggie,

The way you suggested implies that you must change the struct in display.c as well.

I guess if you modify them as is the dsi made, you could achieve results.

Regards,

Boyko

Appreciate the feedback, Boyko. Hmm - I checked OMAP4470 data manual and it mentioned possible configuration of data lanes, but only for DSI. Nothing was mentioned about possibility of this in HDMI. I also noticed that only DSI uses phy.dsi (got a hint after seeing display.c). So in the end, my question is, do you have an idea on whether HDMI lane remapping/setting is really possible for OMAP4470 just as DSI is? Have you ever read or knew of any discussions pertaining specifically to this? # Even the TRM did not mention this..

Hi Maggie,

I am aware that the structure for the hdmi is not in the same manner as is for the dsi,

But I can confirm there is specialized register (HDMI_TXPHY_PAD_CONFIG_CONTROL) allowing swapping of the lines, more information about it can be found in the HDMI addendum which is under NDA agreement.

I see. So I need to use HDMI_TXPHY_PAD_CONFIG_CONTROL documented in HDMI addendum. I have 3 questions.

After searching HDMI_TXPHY_PAD_CONFIG_CONTROL, I found this link.

It says:

• For DSI, you can configure DSI_COMPLEXIO_CFG1 (CLOCK_POL, DATA1_POL, DATA2_POL, DATA3_POL, DATA4_POL)
• For HDMI, you can configure HDMI_TXPHY_PAD_CONFIG_CONTROL(FLIP_P_N_ORDER_CLK, FLIP_P_N_ORDER_D0, FLIP_P_N_ORDER_D1, FLIP_P_N_ORDER_D2)

I can see that DSI_COMPLEXIO_CFG1 is in linux kernel (checked v3.4, ./drivers/video/omap2/dss/dsi.c), but I can't find HDMI_TXPHY_PAD_CONFIG_CONTROL anywhere. I also checked in v3.10, and there's still none.

[Question No. 1]

Will the HDMI addendum contain both documentation AND source code modifications to use HDMI_TXPHY_PAD_CONFIG_CONTROL?

[Question No. 2]

What I need to configure are the "clock lane" and "data lanes". I am under the assumption that the usually configured ones are "data lanes" and "polarity" (our chip's firmware can be reconfigured to remap "data lanes" and "polarity" but NOT "clock lanes").

Before I acquire the license for the HDMI addendum, I would like to know if reconfiguring or remapping both the "clock lane" and "data lanes" is possible given this addendum?

To illustrate, I would like to remap it such that:

Note: I need to do this because the hardware lanes mapping I did are NOT equal to above, thus, as much as possible, I would like to reconfigure in the software side.

[Question No. 3]

Additionally, is reconfiguring or remapping both the "clock lane" and "data lanes" possible in DSI?

Thank you.

Maggie Roxas said:

I can see that DSI_COMPLEXIO_CFG1 is in linux kernel (checked v3.4, ./drivers/video/omap2/dss/dsi.c), but I can't find HDMI_TXPHY_PAD_CONFIG_CONTROL anywhere. I also checked in v3.10, and there's still none.

[Question No. 1]

Will the HDMI addendum contain both documentation AND source code modifications to use HDMI_TXPHY_PAD_CONFIG_CONTROL?

I just saw "HDMI_TXPHY_PAD_CFG_CTRL" in ./drivers/video/omap2/dss/ti_hdmi_4xxx_ip.c/.h.

So please disregard Question No. 1 (I still need answers for Questions No. 2 and 3 though).

Hi Maggie,

The addendum doesn’t have software example but the registers there are well described, which  bit to change in order to achieve your configuration ( polarity and ordering of the lanes). The section there shows dependencies of which registers need to be accessed.

Yes for DSI it is posible to reconfigure polarity and ordering as well, (take a look of the DSI_COMPLEXIO_CFG1 and also registers in the control module).

Regards,

Boyko

Appreciate the feedback.

Boyko Kazakov said:

which  bit to change in order to achieve your configuration ( polarity and ordering of the lanes).

I see. One last confirmation - you mentioned, "polarity and ordering of the lanes".

Do these lanes include BOTH "clock lanes" and "data lanes"?

Now I  know that "data lanes" can probably reconfigured (with reference to HDMI addendum).

But my problem is the "clock lane", is "clock lane" part of configurable "ordering of the lanes" (not just "data lanes")?

If HDMI addendum mentioned that only "data lanes" are configurable, and "clock lane" is NOT configurable, then it will not solve my problem..

Notes:

• "Data lanes" are configurable in display chip firmware.
• "Clock lane" is NOT configurable in display chip firmware.

Thank you very much for confirming! I am currently acquiring HDMI addendum.

I will verify answer for this post as soon as I prove that configuring clock is made possible with it as reference.

Thanks again!

Boyko Kazakov said:

So I am confident that you will be able to solve your problem.

Just got a copy of the HDMI addendum. Indeed, it might solve my problem. Not yet tested, but as you mentioned, usage of HDMI_TXPHY_PAD_CONFIG_CONTROL is the answer. Just can't post the details (same reason you cannot).

Anyway, thanks for the tip! :)