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TI-RTOS IPC initialization

Other Parts Discussed in Thread: SYSBIOS, CONTROLSUITE

Hi all, 

   i am trying to initialize the IPC with my free TI-RTOS. Already i have i2c and spi, UART. Within that i try to initialize the IPC.

My code for IPC initialization is,

// Initialize M3toC28 message RAM and Sx SARAM and wait until initialized
RAMMReqSharedMemAccess(S0_ACCESS, SX_M3MASTER);

HWREG(SYSCTL_MWRALLOW) = 0xA5A5A5A5;

HWREG(RAM_CONFIG_BASE + RAM_O_MSXRTESTINIT1) |= 0x1;
while((HWREG(RAM_CONFIG_BASE + RAM_O_MSXRINITDONE1)&0x1) != 0x1)
{
}

HWREG(RAM_CONFIG_BASE + RAM_O_MTOCCRTESTINIT1) |= 0x1;
while((HWREG(RAM_CONFIG_BASE + RAM_O_MTOCRINITDONE)&0x1) != 0x1)
{
}

//
// Disable writes to protected registers.
HWREG(SYSCTL_MWRALLOW) = 0;

// Register M3 interrupt handlers
IntRegister(INT_CTOMPIC1, CtoMIPC1IntHandler);
IntRegister(INT_CTOMPIC2, CtoMIPC2IntHandler);

// Initialize IPC Controllers
IPCMInitialize (&g_sIpcController1, IPC_INT1, IPC_INT1);
IPCMInitialize (&g_sIpcController2, IPC_INT2, IPC_INT2);

// Enable processor interrupts.
IntMasterEnable();

// Enable the IPC interrupts.
IntEnable(INT_CTOMPIC1);
IntEnable(INT_CTOMPIC2);

// Spin here until C28 has written variable addresses to pulMsgRam
while ((HWREG(MTOCIPC_BASE + IPC_O_CTOMIPCSTS) & IPC_CTOMIPCSTS_IPC17) !=
IPC_CTOMIPCSTS_IPC17)
 {
 }
HWREG(MTOCIPC_BASE + IPC_O_CTOMIPCACK) = IPC_CTOMIPCACK_IPC17;

but i am getting this error,

ti.sysbios.hal.Hwi: line 109: E_stackOverflow: ISR stack overflow.
xdc.runtime.Error.raise: terminating execution  

could you please tell me, how to resolve this error.

Thanks in advance

Thirumoorthy.R

  • Hi,

    Which board are you using? I'm assuming it is one of the f28m3x boards.

    The problem with what you are doing is the vector table. TI-RTOS's kernel (SYS/BIOS) manages the vector table. When you call the MWare IntRegister() API in a TI-RTOS application, bad things happen.

    First a quick overview of the multiple types of IPC available.

    1. Use the IPC Registers directly.

    2. IPC in ControlSuite

    3. IPC-Lite in ControlSuite

    4. IPC in TI-RTOS

    Options 2 and 3 are not designed to work with TI-RTOS. There are a couple things you must do to have it work TI-RTOS. Unfortunately we have not officially documented the steps (we've done it more as a prove of concept, but have not productized it).

    Option 1 works if you don't use MWare to manage the vector table. Instead use the kernel's Hwi module to plug the vector table.

    Option 4 works with TI-RTOS. The demo app on TMDXDOCKH52C1 board demonstrates MessageQ between Tasks on the C28 and M3. It might be worth a quick look at the MessageQ and/or Notify modules to see if they met your needs.

    Todd

  • Hi todd,

     Thanks for your reply.

       I am using F28M35H52C1 which is in my custom board. 

       If i add only this means,

    HWREG(RAM_CONFIG_BASE + RAM_O_MSXRTESTINIT1) |= 0x1;
    while((HWREG(RAM_CONFIG_BASE + RAM_O_MSXRINITDONE1)&0x1) != 0x1)
    {
    }

    That time also i getting same error.

       Could you please tell me that how to configure the IPC and IPC lite.

       Because i am using RTOS for ARM processor only. I would like to use interrupt for getting the data from my DSP. 

       I dont want to use interrupt in my DSP processor.

       If i use messageQ means, it seams to be a task, i need to check it for every time. I need to implement messageQ in both ARM and DSP. 

       I am happy if it is a interrupt to receive the data from my DSP. 

    Thanks in advance

    Thirumoorthy.R