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Why my SRIO interrupt cannot be actived?

Ferdinand
Intellectual 450 points

Hi,all:
   Now I start a SRIO transfer between two DSPs(c6678),say DSP0 and DSP1.

I succeed to move data from DSP0 to DSP1,But srio doorbell interrupt cannot producer.

It means that I can see DSP0 start the transfer and I can see DSP1 has been received

the data,but I cannot see DSP1 enter the SRIO ISR routine.
   Please note one thing that what I say doorbell interrupt is not using Type10 packet

but using Ftype5 NWRITE in my example.By the way the routine on DSP1 run on core0

and the routine on DSP0 run on core1.

1.

If I send a data packet Ftype=5 NWRITE like above how to generate a SRIO

interrupt to receiver ?  Does it need to set ICSR ?

If I set doorbell info like below:

I set doorbellValid = 1 and doorbellreg = 0,doorbellbit = 0.
bindInfo.dio.doorbellValid  = 1;

bindInfo.dio.intrRequest    = 1;

bindInfo.dio.doorbellReg    = 0;
bindInfo.dio.doorbellBit    = 0;

Can I succeed to generate SRIO interrupt with data packet NWRITE?

2.

If I send a doorbell packet Ftype=10 ,how to generate SIRO interrupt?

Do I need to set ICSR or set doorbell info like below:

I set doorbellValid = 1 and doorbellreg = 0,doorbellbit = 0.
bindInfo.dio.doorbellValid  = 1;

bindInfo.dio.intrRequest    = 1;

bindInfo.dio.doorbellReg    = 0;
bindInfo.dio.doorbellBit    = 0;

In one word, Now I want to know very much that is it different about how to generate 

SRIO interrupt when I send data packet NWRITE Ftype 5 and doorbell packet Fype10?

While,What's the difference?


Thanks!

  • 0
    TI__Mastermind 23525 points

    1.  Yes, you can send a NWRITE with doorbellValid set to send data packets followed by a doorbell packet.  The doorbell info field(reg and bit) needs to be setup the way you want for the doorbell packet.  It will reuse the SRCID/DESTID/PRIORITY etc of the data NWRITE packets for the Doorbell.

    2) Yes, you can also just program the LSU to send a sole Doorbell packet by programming a the Ftype 10.  In this case, you don't set the doorbellValid  bit, you simply program all the other SRCID/DESTID/PRIORITY registers and the doorbell info(reg & bit).

    Regards,

    Travis

  • 0 in reply to tscheck
    Intellectual 450 points

    Hi,Travis:

    I see the datasheet of SRIO 6678,But I don't know the difference between LSU completion 

    interrupt and doorbell interrupt.

    1.

    Can you tell me the difference between below terms:

    LSU completion events by LSU number

    LSU completion events by srcID

    Doorbell events

    2.

    How to trigger those three kinds of interrupt above ?

    Do all these three kinds of events need to be triggered by sending doorbell to

    receiver ? Doesn't it have any other ways beside sending doorbell to receiver?

    Thanks 

  • 0 in reply to tscheck
    Intellectual 450 points

    tscheck said:

    1.  Yes, you can send a NWRITE with doorbellValid set to send data packets followed by a doorbell packet.  The doorbell info field(reg and bit) needs to be setup the way you want for the doorbell packet.  It will reuse the SRCID/DESTID/PRIORITY etc of the data NWRITE packets for the Doorbell.

    2) Yes, you can also just program the LSU to send a sole Doorbell packet by programming a the Ftype 10.  In this case, you don't set the doorbellValid  bit, you simply program all the other SRCID/DESTID/PRIORITY registers and the doorbell info(reg & bit).

    Regards,

    Travis

    Hi,Travis:

    Don't we need to set intrRequest = 1 when we want to send doorbell interrupt request?

  • 0 in reply to Ferdinand
    TI__Mastermind 23525 points

    The LSU completion interrupt is given on the transmit side of things once a TX transfer has completed.  The Doorbell interrupt is on the RX side when a Doorbell packet has been received from the sender to notify a packet reception.

    Ferdinand said:

    1.

    Can you tell me the difference between below terms:

    LSU completion events by LSU number

    LSU completion events by srcID

    Doorbell events

    If you have multiple cores using the same LSU, then there needs to be a way for each core to know when its submitted transaction has been sent.  So in this scenario, each core would have an unique SRCID (one of 16 supported) it uses and then that core only looks at the completion interrupt for that SRCID.  In this scenario, interrupts are routed to RIO_LSU0_ICSR for good and error completions.  If you set it up for interrupts by LSU number, it would use RIO_LSU1_ICSR for good completions.  This might be used  if the LSU is being used by the EDMA.  Error indications are always from RIO_LSU0_ICSR though.

    Received Doorbells cause a interrupt to be set in RIO_DOORBELLx_ICSR register.

    Ferdinand said:

    2.

    How to trigger those three kinds of interrupt above ?

    Do all these three kinds of events need to be triggered by sending doorbell to

    receiver ? Doesn't it have any other ways beside sending doorbell to receiver?

    Hopefully above helped  clarify the triggers and handling.

    Regards,

    Travis

  • 0 in reply to Ferdinand
    TI__Mastermind 23525 points

    No.  The intrRequest bit is used to determine if the LSU will generate an interrrupt (if asserted) for the local core (good completion or error completion) once the TX transaction has completed.  If you assert the SUP_GINT too, then only the error conditions will cause an interrupt, and good completions will not.

    Regards,

    Travis