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Latchup protection on the C6457 DSP

Hi, I have a quick question:

Are the C6457 IO ports (GPIO / EMIF / I2C / clock buffers, etc) protected against latchup caused by applying signal voltages before the processor has been fully powered-up?

I ask because the processor has very specific power-sequencing requirements (DVDD18 -> CVDD11/DVDD11 -> DVDD33), with several hundred milliseconds in total before everything is up and running. During that time, many of these pins will be exposed to their normal signal levels, and I wanted some reassurance that this will be OK as the datasheet doesn't seem to mention the topic.

Thanks for the help!

- Craig