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6638 k2k multicore : AIF2 timer query

Manav Gupt
Intellectual 545 points

Hi,

I am developing a AIF2 driver application "using C6638 k2k multicore EVM" to send/receive GSM I&Q samples over the LTE symbols via AIF2 driver.

In 120 milli sec, I will able to send 208 GSM TimeSlots data over 240 LTE TimeSlots. 

 

Using the AIF2 multicore LLD, I am able to send/receive packets continuously.

From the aspect of exception handling, Now my target is to simulate that in 120 milli sec there are exactly 208 GSM and 240 LTE slots.

As there is no GSM TS interrupt available in AIF2 AT module, please suggest a solution to verify that there are exactly 208 GSM TS in 240 LTE TS.

 

Thanks and Regards,

Manav

 

 

  • 0
    TI__Expert 4740 points

    Manav,

    AIF2 basically only support one radio standard from AT. we have RADT, ULRADT, DLRADT in AT but three of them sharing the same symbol and clock terminal count, which means it is only applied to one Radio standard.

    your application can verify if you get 208 GSM TS within 240 LTE slots or not by comparing received GSM TS packets within 240 LTE slots. if you really need 208 GSM TS interrupt instead of 240 LTE slot event, you can set AT RADT timer terminal counts for GSM TS instead of LTE, then you can get GSM TS event from AT.

    Regards,

    Albert

  • 0 in reply to Albert Bae
    Intellectual 545 points

    Hi Mr. Albert,

    As suggested by you, I have checked whether within 240 LTE slots "120 milli sec" do i get 208 GSM slots or not.

    I am runing the sample project for 2400 LTE slots.---->  Starting my "577 us BIOS timer" when "slotcount == 1" and monitoring the "577 us"<GSM> slot counts over 240 LTE slots interval  "slotcount%240 == 0".

    I am not able to get 208 "GSM 577 us slots " but its coming out to be 166 GSM slots.

    I suggest i should send you the sample projects with timer functionality for both the DSP's "6618 and 6638".

    That may help to resolve the issue quickly.

     

    Thanks and Regards,

    Manav

     

     

  • 0 in reply to Manav Gupt
    Intellectual 545 points

    Hi Mr. Albert,

    It seems to be the difference between the clock of BIOS "1.2 Ghz" and the AIF2 "1 Ghz".

    Thanks for the support.

     

    Regards,

    Manav

     

     

     

  • 0 in reply to Manav Gupt
    TI__Expert 4740 points

    normally, incorrect clock setup cause these kind of problem. I only focused on sys_clock because AT use sys_clock only but in your case, it came from VBUS clock, because you were using generic timer event with VBUS clock from BIOS.

    anyway, happy to hear the good news.

    Regards,

    Albert