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u-boot splash failed with data abort

x10
Intellectual 765 points
Other Parts Discussed in Thread: AM3354, DA8XX

Hi, All

My system is am3354 based. A splash is required in u-boot. With migrating da8xx-fb.c, the LCD hardware can be setup correctly, but failed when display splash bmp image which is read from NAND. The following are message about the error:

U-Boot SPL 2013.10 (Jan 06 2014 - 14:10:46)
The Expected Linux image was not found. Please check your NAND configuration.
Trying to start u-boot now...


U-Boot 2013.10 (Jan 06 2014 - 14:10:46)

I2C: ready
DRAM: 256 MiB
WARNING: Caches not enabled
NAND: 256 MiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
rev: 0x4f201000 Resolution: 800x480 32
LCD Clock: 200000000 Divider: 6 PixClk: 33300000
Requesting 0x177000 bytes for framebuffer at 0x82000000
data abort

MAYBE you should read doc/README.arm-unaligned-accesses

pc : [<8f77bd74>] lr : [<8f77c82c>]
sp : 8f62adf8 ip : 8f651541 fp : 80813d34
r10: 84000000 r9 : 8f62af30 r8 : 4030cdcc
r7 : 4030cb7c r6 : 8f651538 r5 : 8ffbcc0c r4 : 8ffbcc10
r3 : 0000004d r2 : 00000000 r1 : 00000000 r0 : 84000000
Flags: nZCv IRQs off FIQs on Mode SVC_32
Resetting CPU ...

There are following MACROs about video display in file am335x_evm.h:

#define CONFIG_VIDEO
#if defined(CONFIG_VIDEO)
#define CONFIG_VIDEO_DA8XX
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_CMD_BMP
#define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE /* am335x LCD base */
#define PWM_TICKS 0x1388
#define PWM_DUTY 0x200
#define CONFIG_SPLASH_OFFSET 0x00180000 /* for block size = 128KB, block_id = 12 */
#define CONFIG_SPLASH_ADDRESS 0x8f000000 /* the last 16MB of DDR3 (256MB) */
#endif

When u-boot startup, DENX logo can be displayed on upper-left of screen. Command clrlogo can clean that logo, but command bmp info will results the same error above.

I don't quite understand what's exactly mean of "arm-unaligned-accesses", is it related to armv7? It's highly appreciated for any suggestion and hits, thanks!

BR

Cheng Shi

emtronix

  • 0
    TI__Mastermind 25235 points

    Hi,

    Are these "clrlogo" and "bmp info" your custom U-Boot commands?

    Please read the <u-boot_dir>/doc/README.arm-unaligned-accesses document as suggested and see if any of the examples and solutions given apply to your custom code.

    Best regards,
    Miroslav

  • 0 in reply to Miroslav Kiradzhiyski XID
    Intellectual 765 points

    Thanks Miroslav, I did add "-mno-unaligned-access" to those modules related to splash display, and splash display is going fine. But another issue comes out: the speed of drawing splash bmp is obviously slower than that in my another arm9(imx28) based board. This board is setup on 1GHz with am3354. I wonder if some cache options should be included in config file, Is that possible?

    BR

    Cheng Shi

    emtronix

  • 0 in reply to x10
    Expert 1210 points

    By default, in the am335x u-boot supplied in the SDK (ti-sdk-am335x-evm-06.00.00.00/board-support/u-boot-2013.01.01-psp06.00.00.00), the instruction cache is enabled and the data cache is disabled.  This is due to DMA coherency issues somewhere in the drivers (see the u-boot git history).  I'm not sure where the problem lies.

    I found that for my configuration (NAND), I could enable dcache in u-boot (but not in u-boot SPL!), and it did speed things up.