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OMAP-L138 uPP DMA issue

Reino Harmse
Intellectual 330 points
Other Parts Discussed in Thread: OMAP-L138

Hi,

I currently have a CPLD passing data to the uPP of an OMAP-L138 processor. The port is controlled by the DSP.

I have two input buffers for the uPP which is used in a Ping-Pong fashion. Everything is working as expected. I would like to add a function that allows me to stop the uPP at any time, point it to a third input buffer and make it start a new window there.

 My question is this: Is there a quicker way of achieving this than by putting the uPP in a software reset?

Thank you in advance.

Regards, 

Reino

  • 0
    TI__Mastermind 20790 points

    Reino,

    The WAIT signal is active-high by default, but its polarity is controlled by the WAITPOLx bit in UPICR.
    This is driven by receiver. Asserts to request a pause in the current transfer.
     
    When the receiver asserts WAIT, the transmitter responds by stopping transmission (starting with the next word) until WAIT is released.

    The receiver ignores all incoming data until WAIT is released. Once WAIT is released, the transmitter can resume transmission on the next word.


    In transmit mode, WAIT is an input signal and may be disabled using the WAITx bit in UPICR.
    In receive mode, WAIT is an output signal.

  • 0 in reply to Pubesh
    Intellectual 330 points

    Pubesh, thanks for the quick response.

    My understanding is that the wait signal does what you described, but does not start a new window, instead it just makes the uPP ignore incoming data while it is asserted. 

    I am working on a workaround from the CPLD side.

    Thanks though.

  • 0 in reply to Reino Harmse
    TI__Mastermind 20790 points

    Hi,

    Yes, Your understanding is correct. I like to know, did you find the solution in the CPLD side. It may help future readers.

  • 0 in reply to Pubesh
    Intellectual 330 points

    Hi Pubesh,

    An additional data line was put in place between the OMAP (GPIO output port) and the CPLD. The OMAP notifies the CPLD via this connection when a break in the window has to occur. The CPLD inserts a marker in the data it is forwarding without influencing the data flow.

    The uPP carries on as usual by pushing the data into a triple buffer while the CPU searches the data for the marker when necessary. To compensate for the additional processing requirements, two DMA controllers are used to move data out of the triple buffer.

    The breaking-in into data windows is therefore done in processing, rather than the uPP.

    Regards,

    Reino