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Help: Problem OMAPL137 Missing pulse triggered interrupts

vibi sreenivasan
Prodigy 10 points

hello,

        Has anyone faced problem of missing interrupts in omapl137 because of AINTC produces a pulse trigger to ARMcore.

        Actually we are using a custom interrupt handler function which disables the disables the interrupt source in AINTC & calls the peripheral interrupt handler function.

       For I2C some interrupts gets generated when the control is inside the peripheral interrupt handler function & we misses those interrupt,

      since interrupts are pulse triggered & not level triggered.

      Is there any way to latch this interrupt from AINTC to ARM Core or any way to change the pulse triggered interrupt to level triggered.

      Please let me know if you need any more details regarding this problem.

 

 Thanks in advance

 

Regards

vibi sreenivasan

  • 0
    TI__Guru 62975 points

    Vibi,

    There is no way to change the interrupt type from pulse to level on OMAPL137.

    The AINTC interrupt controller does not have the ability to track multiple occurences of a system interrupt.  So while the I2C interrupt flag is set in AINTC, additional I2C interrupts will be dropped.  If this is the root of your problem, there are two methods that can help:

    1. Clear the AINTC interrupt status for I2C before dispatching the I2C ISR, and/or
    2. Check the interrupt status registers in I2C before exiting the ISR.  The ISR should service all pending interrupts before exiting.

    -Tommy