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DDR3 INTERFACE

ARUNA KUMAR K H
Prodigy 40 points

HI ALL,

With respect to the DM8148 DDR III controller, in referencing the SPRS647B ( datasheet ) and the SPRUGZ8 ( Technical Reference Manual ), I am confused regarding the total memory size supported by the Dm8148.

Datasheet page 2 indicates 2GB total memory address space, where the TRM page 910, section 6.1.2, indicates 1GB toal memory address space.

I am using MT41K256M16HA-107 Micron DDR3(256MX16) , i need to achieve 1GB density, currently i am using TWO devices.

DM8148 having two channel , i have confusion on each channel need to be use or any one channel i can use to achieve 1GB(256MX16)

Regards,

Arun

MT41K256M16HA-107 IT:E
  • 0
    TI__Guru**** 170625 points

    Hi Arun,

    ARUNA KUMAR K H said:
    SPRUGZ8 ( Technical Reference Manual )

    ARUNA KUMAR K H said:
    where the TRM page 910, section 6.1.2, indicates 1GB toal memory address space.

    The latest version of the DM814x TRM is SPRUGZ8E:

    http://www.ti.com/lit/ug/sprugz8e/sprugz8e.pdf

    section 6.1.2 Features does not state that DDR3 supports up to 1GB.

    Up to 8 2Gbit DDR3 devices can be used, totally 2GBytes.

    http://processors.wiki.ti.com/index.php/EZSDK_Memory_Map#Changing_Memory_Map_For_512MB_DM816x_Board

    In the default uboot program ( in file $(EZSDK_ROOT)/board-support/u-boot-<REL-TAG>/board/<ti8168 or ti8148>/ti/evm.c), 2GB physical memory is mapped using register 3 and 4.

    Following code programs the LISA registers for 2GB physical memory

    Best regards,
    Pavel

  • 0 in reply to Pavel Botev
    Prodigy 40 points

    Dear Pavel,

    There is a two channel , Currently i am using DDR0 channel with 2 devices of X16. remain DDR1 channel i am not going to use.weather i need to add any pull up or pull down for unused DDR1 channel .

    Please give me a inputs.

    Thanks & Regards,

    Arun

  • 0 in reply to ARUNA KUMAR K H
    TI__Guru**** 170625 points

    Arun,

    You can refer to the below e2e thread:

    http://e2e.ti.com/support/arm/sitara_arm/f/791/t/278135.aspx

    It is for AM335x device, but recommendations are also valid for DM814x/AM387x device.

    Also you can have a look in the DM814x datasheet, sections 4.4 Handling Unused Pins, 4.5.1 Pullup/Pulldown Resistors and 8.13.4.2 DDR3 Routing Specifications.


    And the below for the software side:

    http://processors.wiki.ti.com/index.php/TI814x-DDR3-Init-U-Boot#FAQ

    Best regards,
    Pavel