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Audio sample of BIOSPSP cannot run @456MHz clock rate

zhongfan yang
Prodigy 235 points

Hi, Just test the function of audio sample of BIOSPSP(03.00.01.00) over the C6748LCDK. I found it CANNOT work at 456MHz maximimum clock rate (It stuck in the GBLCTL setting loop) and I want to know is that normal?

If that is the case, then what is the workaround over this problem? Thanks in advance!

Z.F.Yang 

 

  • 0
    TI__Mastermind 18320 points

    Zhongfan,

    I have moved this thread over to the device forum in hopes that it will get a faster response there.

  • 0
    TI__Mastermind 35645 points

    Hi Yang,

    Thanks for your post.

    Please check your device frequency configured in gel file. I believe, the cpu runs @ different frequency other than 456MHz and in order to configure the c6748 cpu to run @ 456MHz, you need to configure the appropriate deveice frequency (456MHz in your case) through PLL0 settings in the gel file like as below:

    Set_Core_456MHz() {
        device_PLL0(0,18,1,0,1,17,9);
        GEL_TextOut("\tPLL0 init done for Core:456MHz, EMIF:25.33MHz\n","Output",1,1,1);

    }

    Also, please ensure the function in the GEL file that configures the device frequency 456MHz write to the PLL lock register towards the end of the function.

    Please go through the below E2E thread to configure the device frequency @456MHz  adjusting through PLL0 registers (PREDIV, POSTDIV etc)

    http://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/115/t/124149.aspx

    Thanks & regards,

    Sivaraj K

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  • 0 in reply to Sivaraj Kuppuraj
    Prodigy 235 points

    Hi, Sivaraj:

    Thanks for your feedback.  I think there is no need to doubt over my correct configuration of 456MHz clock here, and the recommended setting provide by you is INCORRECT: 'device_PLL0(0,18,1,0,1,17,9)' does NOT set core freq to 456MHz, rather it sets to 288MHz.

    By the way, the OFFICIAL gel file for C6748LCDK that comes with the LCDK when I bought this platform (or you can find it in the CCS install diretory "\ccsv5\ccs_base\emulation\boards\lcdkc6748\gel", they are identical) have the entry for 456MHz, here is the snippet:

    Set_Core_456MHz() {
    device_PLL0(0,18,0,0,1,11,5);
    GEL_TextOut("\tPLL0 init done for Core:456MHz, EMIFA:38MHz\n","Output",1,1,1);
    }

    As far as I can tell, the value seems correct. And a simple copy and overwrite should suffice to put the platform on 456MHz clock rate.
    In case you might have doubt over my hardware platform, I can verify the Audio sample runs at 300MHz quite perfectly.


    The bottom line is 1:the hardware platform,2:the BIOSPSP software package, 3:the gel file all are OFFICIALLY certified product, and if there is any doubt over its function it should be quite easy and simple to deal with. I just wonder did they ever made any serious test before they are released to market?

    Regards

    Z.F.Yang