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Uart2 on am335x

I intend to use the rgmii mode of the Mac1, So gpio3_2 and gpio3_3 is available for my purpose .

I want to make them as uart2 txd and rxd.

But i found that the arch/arm/mach-omap2/mux33xx.c  in the kernel version 05.06.0.0

_AM33XX_MUXENTRY(MII1_RXERR, 0,
  "mii1_rxerr", "rmii1_rxerr", "spi1_d1", "i2c1_scl",
  "mcasp1_fsx", NULL, NULL, "gpio3_2"),
 _AM33XX_MUXENTRY(MII1_TXEN, 0,
  "mii1_txen", "rmii1_txen", "rgmii1_tctl", NULL,
  "mcasp1_axr0", NULL, "mmc2_cmd", "gpio3_3"),

The mode 6 of both pin all null,but I do find that uart2 is available in the pinmux tool and schematic.

Can anyone confirm to me that whether these two pin can work as uart2? and why mode6 of these two pin is null in mux33xx.c ?

 

  • Hi Wang,

    Which processor and package are you using?

    Please note that uart2_rxd signal is available on pin named MII1_CRS (gpio3_1) in mode 6, not in the MII1_TXEN (gpio3_3) as you posted.

    For valid pinmux combination please use the pinmux utility for AM335x processors http://www.ti.com/tool/pinmuxtool

    There a valid IO set of pin functions must be verified before entering it in pinmuxing.

    Hope this helps,

    BR,

    Vidin

  • Hi WANG,

     According to pin mux, by using this two pins you can get only uart2_txd pin from (MII1_RXERR) in mode 6 by defining the pin as shown below.

    _AM33XX_MUXENTRY(MII1_RXERR, 0,
      "mii1_rxerr", "rmii1_rxerr", "spi1_d1", "i2c1_scl",
      "mcasp1_fsx", uart5_rtsn, uart2_txd, "gpio3_2"),

    But You cant get uart2_rxd  because (MII1_TXEN) pin doesn't have uart2 in mux 

     _AM33XX_MUXENTRY(MII1_TXEN, 0,
      "mii1_txen", "rmii1_txen", "rgmii1_tctl", NULL,
      "mcasp1_axr0", NULL, "mmc2_cmd", "gpio3_3"),

    Its in RMII_CRS pin, if you can afford this pin then you can use them

    _AM33XX_MUXENTRY(MII1_CRS, 0,
    "mii1_crs", "rmii1_crs_dv", "spi1_d0", "i2c1_sda",
    "mcasp1_aclkx", uart5_ctsn, uart2_rxd, "gpio3_1"),

    Rajeev


  • Rajeev,thank you

    Yes ,I have  tested it .It is ok