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6657 SPI Receive Issue

Expert 2875 points

Hi Brad,

I have a EDMA3 problem running on TMDSEVM6657LS.  I setup EDAM3 to SPI receive with a circular buffer.  It works perfactly for SPI rate of 2MHz.  When I increased SPI rate to 4MHz, there are intermittent double word received from SPI.  My Oscilloscope reading does not show the extra word.

What might cause this problem?

I am attaching the scope capture and EDM3 buffer content for your inspection.

Thank you.

Steve

  • Steve,

    I split this topic into its own thread.  Generally speaking a "repeated word" as you're observing (that is confirmed to NOT be present on the bus) is caused by too many reads from the port, i.e. you're underflowing the port by performing too many reads. Once the peripheral runs out of data all subsequent reads will return the last data.  So in your case it looks like you have one extra read which is why you get the repeated data.

    You should look more closely into your EDMA configuration to make sure that you're transferring the proper amount of data per SPI event.  For example, do you have AB-sync=0 (A-sync) and ACNT=2?  Do the repeated elements have any relationship to your buffer size (or transfer size BCNT)?  For example, is the repeated element always the first or last element of the transfer?  What effect does increasing the speed to 8 MHz have?  What effect does changing the buffer size have?  All these things will help to understand where exactly the problem is.

    Brad

  • Hi Brad,

    Thanks for the reply.  I thought EDAM transfer is triggered by the sync event from SPI.  How can it make an extra read?

    do you have AB-sync=0 (A-sync) and ACNT=2?  AB-sync, ACNT = 4.

    Do the repeated elements have any relationship to your buffer size (or transfer size BCNT)?  BCNT = 32.

    Is the repeated element always the first or last element of the transfer?  No, mostly in the middle.

    What effect does increasing the speed to 8 MHz have?  Higher the speed increse error frequency.

    What effect does changing the buffer size have?  None.

    Thank you.

    Regards,

    Steve

  • SGQ said:
    AB-sync, ACNT = 4.

    SGQ said:
    BCNT = 32.

    There's no FIFO on the SPI peripheral so you're handling data element by element.  I don't understand your settings above.  These settings would be appropriate if you had a 32-bit wide FIFO and were being signaled to read out 32 words.  However, the SPI peripheral does not have a FIFO and only can accept data up to 16-bits (i.e. 2 bytes).  That's why I expected you to have A-sync transfer with ACNT=2.

  • I do use the EDMA3's 32 byte FIFO.

  • That FIFO is something used internally by the EDMA when transferring a block of data.  In this case however the SPI will send an event for every element received.  Basically you're getting an event for every word but doing 32 transfers (instead of 1 transfer) to respond.

  • Oh, I am sorry that at a different driver code.

    do you have AB-sync=0 (A-sync) and ACNT=2?  A-sync, ACNT = 2.

    Do the repeated elements have any relationship to your buffer size (or transfer size BCNT)?  BCNT = 0x1000, Rx circular buffer size..

  • SGQ said:
    Do the repeated elements have any relationship to your buffer size (or transfer size BCNT)?  BCNT = 0x1000, Rx circular buffer size..

    So do you see multiple repeated data within a block of 0x1000 elements?

    How fast are you running the CPU?

  • My SPI received 100 shorts (16 bits) at a time.  C6657 CPU is running at 1GHz.

  • SGQ said:
    My SPI received 100 shorts (16 bits) at a time.

    What does this mean?  Our SPI peripheral can only be used as a master, so the size of the transaction should be dictated by your EDMA settings.  You previously indicated your BCNT=0x1000, so therefore I expected 4k transactions.  Now you indicate you receive 100 shorts.  Are you saying you get a "double read" every 100 words?  Is it consistent (for a given SPI frequency)?

  • Yes, SPI is a master.  SPI receiver is setup with EDMA3 and continuously putting received data into a CIRCULAR buffer of size 0x1000.  As a test, I transmit 100 shorts (16 bits) data at a time.  When I, the master transmits 100 shorts, the slave sends back 100 short with a patter of 0x0101, 0x0202, 0x0303, ... 0x6464.