RS-485 RX/TX on TM4C123's 8 UARTs

Stephen Killingsworth

Other Parts Discussed in Thread: TM4C123FH6PM, SYSBIOS

I am developing on the TM4C123FH6PM using CCS V5.5 and TI-RTOS 1.21.

My project is to utilize all 8 UARTs with external RS-485 interfaces. The nature of the communication RX messages is that the length of any given message is variable. I need to detect the end of a message frame to initiate action on the message. I thought that I could use one of the MCU timers in one-shot mode and re-trigger the timer on each byte received. However, there are not enough timers in the MCU to allow one to be associated with each port.

I think that using the CLOCK module and creating a one-shot timer for each port. In order for this to work, I must be able to "re-trigger" this module on each byte received and set the timeout value longer the one-character time (BAUD rate dependent).

I was in the process of implementing this strategy when I read this from the CDOC:

Void Clock_setTimeout(Clock_Handle handle, UInt32 timeout);

   ARGUMENTS
       handle — handle of a previously-created Clock instance object
       timeout — initial timeout in Clock ticks
   CONSTRAINTS
       Cannot change the initial timeout of instance that has been started. <<<=====

I think this means that I can't do what I had planned:
   A. Create the one-shot in the GUI.
   B. Start it on my first RX'd character
   C. Stop on the next character
   D. Reset the timeout period.
   E. Start the timer again - hoping that it runs again from 0 to timeout value.

Using this method once the timer finally expires the function called will execute when the message frame is ready for processing.

Transmitting is not so difficult as I know when the last byte is sent and I can trigger the one-shot to allow the UART to clock out the byte with a sufficient amount of extra dead time before changing the RTS line to put the RS485 converter back into RX mode.

My main question is: Can I stop, then reset the timeout period, and then restart a CLOCK module repeatedly in the manner described above?

PLAN B: In a CLOCK module timer, read a Global that keeps track of the number of bytes received - incremented by the RX call back function. In this timer module I would look at this byte counter and detect when it is NOT zero and NOT incrementing after several cycles of the timer. My concerns here are can I lock out the RX callback routine from modifying the byte counter while I am checking the counter in the timer isr. Using global INT disable would work however, it slows down system response and steals time from the scheduler. Advantages of this solution - responsive to message end and only one timer can check ALL UART channels.

PLAN C: Use a high priority task to check the byte counters which are pushed via message queues. I have no experience in using message queues. I am concerned that if I put a queue each time a character arrives, will the task run at a sufficient frequency to service and empty the queue or will an overrun occur?

I want to use a method that minimizes memory footprint and system resources. My BAUD rates range from 4800 to 115,200. It is not acceptable to set a one-shot timer for the longest possible time delay based on the buffer length and slowest BAUD rate as this would artificially delay system response time.

I would appreciate any architectural and code example ideas offered.

Thank you.

over 11 years ago

0 Moses Isang over 11 years ago

TI__Expert 8175 points

Hi Stephen,

I don't know the full gist of your design but my first thought was sending a terminating character to avoid all this complication but I'm thinking you've probably thought about that.

If you're deciding on going with using timing to signal the end of a message stream then your ideas are on the right path.

The Clock module can be used to carry out your original idea.

First you can't create a one-shot instance of the module, you'll have to specify a timeout period (in clock ticks) and supply a function that runs when that period expires. And to answer your question, yes you can stop the clock count before the period expires and when you start the clock again, it starts a fresh count. So your steps will look something like:

A. Create a Clock instance with specific period in the GUI.
   B. Start it on my first RX'd character
   C. Stop the clock on the next character
   D. Start the clock, it re-starts on a fresh count.
   E. When the end of stream is reached and the clock counts till the end of the period, your function runs as a Swi

Since Swi's (Software interrupts) can only be pre-empted by a Hwi(hardware interrupt), you may want to keep the code in your clock function as small as possible. An idea can be to have your message processing code in a task that's blocked on a semaphore and have your Clock function post the semaphore to release that task to run.

Another idea, you can have 8 flags for each of your UARTS, each of them set to a starting value. You can create a periodic timer that every time it expires, runs an ISR that decrements the flag values for all the UARTS and checks if the value is 0(to signal the end of a message stream). In your RX callback function, for each UART you reset the flag value to its original. When the end of a message stream is reached, the timer will decrement the the flag value till it hits 0, and then you can run your processing code.

Let me know if this helps

Moses

0 Stephen Killingsworth over 11 years ago in reply to Moses Isang

Intellectual 270 points

Thank you - it is good to know that I can stop and reset one-shot Clock timers.

I implemented your last idea (which I have used before in other projects). This seems to be a palatable solution for now. Although I am tracing down an issue.

If I wanted to mix strict ISR based COMMs with TI-RTOS, is this possible. Would I use a semaphore and message queue to hand off the RX data from the ISR to RTOS objects?

Do you have a step by step guide for mixing ISR based coding and not using the TI-RTOS drivers?

I want to use the FIFO and no chars received timeout features if I can't get satisfactory performance and reliability from the RTOS driver.

Thank you

0 Stephen Killingsworth over 11 years ago in reply to Stephen Killingsworth

Intellectual 270 points

I am having a lot of trouble with this UART driver using callback mode. See previous posts. I have been trying to get a simple UART RX/TX routine running. My code below works as long as I ONLY send 5 of less characters. The idea is a timer is fired at each character received. Once the last character is received the timer expires and initiates a transmit of the received data to a "linked" port. In the case of this test I have the same port as the transmit and receive port (echo). The serial connections have RS-485 interfaces so the RTS line has to be controlled to shift between RX and TX. This fact is, however, not relevant to the failure of this code with 6 or more characters received as it also works with a simple RS-232 driver connected.

I am at my wits end with this "simple" code not working.

Here is my code. Note that I have disabled (commFrameIsr) and am using one-shot clock module timers in this version. The problem is the same when the code used a Timer and count down counters for End of Frame and RTS switch detect.

Here is my code:


/******************************************************************************\
* INCLUDE FILES
\******************************************************************************/

/* XDCtools Header files */
#include <xdc/std.h>
#include <xdc/cfg/global.h>
#include <xdc/runtime/System.h>
#include <xdc/runtime/Log.h>				//used for Log_info() calls

/* BIOS Header files */
#include <ti/sysbios/BIOS.h>
#include <ti/sysbios/hal/Hwi.h>

/* TI-RTOS Header files */
#include <ti/drivers/GPIO.h>
#include <ti/drivers/UART.h>

/* Board Header files */
#include "Board.h"
#include "INA226.H"
#include "24AA256.H"
#include "KSZ8895.H"
#include "MCP3426.H"
#include "SC16IS752.H"


/******************************************************************************\
* ROM CONSTANTS
\******************************************************************************/
/*
 * Menus and Prompts
 */
const Char configMenu[] = 	"\f1. Exit\r\n"
							"2. Select ACTIVE Command Port\r\n"
							"3. Select ACTIVE Linked Port\r\n"
							"4. Configure Reporting\r\n";
const Char cmdPortSelectMenu[] = 	"0. Abort\r\n"
									"1. UART0\r\n"
									"2. UART1\r\n";
const Char configPrompt[] = "MCB-Q1 Test CMD>\r\n";
const Char cmdPortPrompt[] = "\nSelect ACTIVE command port";

/******************************************************************************\
* DEFINED CONSTANTS
\******************************************************************************/
#define UARTBUFSIZE		(256)
#define NUMUARTS		(MCB_IO_UARTCOUNT + 2)	// Includes the SPI UARTS
#define SPIUART0		(MCB_IO_UARTCOUNT)
#define SPIUART1		(MCB_IO_UARTCOUNT+1)
#define NUMTXBUFFS		(2)		// Maximum Simultaneous TX Processes

/******************************************************************************\
* MACROS
\******************************************************************************/




/******************************************************************************\
* TYPE DEFINITIONS
\******************************************************************************/
typedef enum ctType {ctMcuCmd, ctTpComm} _ctType;

typedef struct portDCB {
	bool			portOpened;		// TRUE if port is Opened
    UART_Handle		handle;			// Port access handle
    UART_Params 	params;			// Port configuration Parameters
    _ctType			uPorttype;		// Port Type
    bool			txMode;			// TRUE if in Transmit Mode
    MCB_IO_GPIOName	RTS_pin;		// RS-485 RTS GPIO Pin
    Char			rxInChar;		// Buffer for current RX'd byte
	Char			rxBuff[UARTBUFSIZE];	// RX Buffer (TX Managed by commTxTask
	void *			linkedPort;		// Pointer to uartDCB of the Linked Port
	uint8_t			index;			// Pointer to Next Byte
	uint8_t			count;			// Bytes RX'd or to TX
	int		 		EOFCounter;		// RX End of Frame Counter (re:commFrameIsr)
	int				RTSCounter;		// TX End of Frame Counter (re:commFrameIsr)
	uint32_t		bytesRX;		// Total bytes received
	uint32_t		lostBytesRx;	// Bytes discarded due to RX when INACTIVE
	uint32_t		bytesTX;		// Total bytes transmitted
} uartDCB;

typedef struct portMap {
	uartDCB			*portDCB;		// DCB of linked UART port
} _portMap;


/******************************************************************************\
* GLOBAL VARIABLES
\******************************************************************************/
//
// UART Control Structures
//
uartDCB	uart0DCB;
uartDCB	uart1DCB;
uartDCB	uart2DCB;
uartDCB	uart3DCB;
uartDCB	uart4DCB;
uartDCB	uart5DCB;
uartDCB	uart6DCB;
uartDCB	uart7DCB;
uartDCB	uartSb0DCB;
uartDCB	uartSb1DCB;

//
// Array of pointers to link UARTS for message passing
//
_portMap	portData[NUMUARTS];


/******************************************************************************\
* FUNCTION PROTOTYPES
\******************************************************************************/
void uart1readCallback(UART_Handle u2Handle, Char *p_buffer, int size);
void uart1writeCallback(UART_Handle u2Handle, Char *p_buffer, int size);


/******************************************************************************\
* RTOS OBJECTS
\******************************************************************************/

//////////////////////////////////////////////////////////////////////////////
//////////////////////////////       HWI       ///////////////////////////////
//////////////////////////////////////////////////////////////////////////////
/*
 * commFrameIsr
 */
void commFrameIsr(void)
{
//	Log_info2("CFIsr-st: EOFCounter = [%u] RTSCounter = [%u]",uart1DCB.EOFCounter, uart1DCB.RTSCounter);

	if(uart1DCB.EOFCounter > 0) uart1DCB.EOFCounter--;
	else if(uart1DCB.EOFCounter != -1)
	{
		uart1DCB.EOFCounter = -1;
//		Semaphore_post(u1MessageReady);
		// Fire message processing SWI
		Log_info1("CFIsr: Swi_post(u1RxDoneSwi) EOFCounter = [%u]",uart1DCB.EOFCounter);
		Swi_post(u1RxDoneSwi);
	}

	if(uart1DCB.RTSCounter > 0) uart1DCB.RTSCounter--;
	else if(uart1DCB.RTSCounter != -1)
	{
		uart1DCB.RTSCounter = -1;
//		Semaphore_post(u1MessageReady);
		// Fire message processing SWI
		Log_info1("CFIsr: Swi_post(u1TxDoneSwi) EOFCounter = [%u]",uart1DCB.EOFCounter);
		Swi_post(u1TxDoneSwi);
	}

//	Log_info2("CFIsr-en: EOFCounter = [%u] RTSCounter = [%u]",uart1DCB.EOFCounter, uart1DCB.RTSCounter);


}

/*
 * UART1 - Read Callback
 */
void uart1readCallback(UART_Handle handle, Char *p_buffer, int size)
{
UInt hwiKey;

//	Log_info2("RXcb-st: EOFCounter = [%u] RTSCounter = [%u]",uart1DCB.EOFCounter, uart1DCB.RTSCounter);
    // Ignore zero byte calls
	if(size > 0)
	{
		// Is port in Receive Mode
		if(uart1DCB.txMode)
		{
			uart1DCB.lostBytesRx += 1;
		} else {

			// Re-Trigger the UART2 End of Message Detection Timer
		//	GPIO_write(Board_U1_RTS, MCB_IO_485_RX);
			Clock_stop(u1RxFrameDetect);
			Clock_setTimeout(u1RxFrameDetect, 5);
			Clock_start(u1RxFrameDetect);

			// Reload the End of Frame Counter
	//		hwiKey = Hwi_disable();
			uart1DCB.EOFCounter = 2;
	//		Hwi_restore(hwiKey);

			// Arm Receiver for next callback
			uart1DCB.rxBuff[uart1DCB.count++] = *p_buffer;
			UART_read(handle,  &uart1DCB.rxInChar, 1);
		}
	}
//	Log_info2("RXcb-en: EOFCounter = [%u] RTSCounter = [%u]",uart1DCB.EOFCounter, uart1DCB.RTSCounter);
}


/*
 * UART1 - Write Callback
 */
void uart1writeCallback(UART_Handle handle, Char *p_buffer, int size)
{
	uartDCB *dcb;
	uartDCB *linkPort;
	dcb = &uart1DCB;
	linkPort = portData[Board_UART1].portDCB;

	Log_info2("TXcb-st: EOFCounter = [%u] RTSCounter = [%u]",uart1DCB.EOFCounter, uart1DCB.RTSCounter);
	if(linkPort->index < linkPort->count)
	{
		// Send next byte
		// Start TX by sending the first byte
		UART_write(dcb->handle, &(linkPort->rxBuff[(linkPort->index)++]), 1);
		linkPort->RTSCounter = 2;
		Clock_stop(u1TxRtsTimer);
		Clock_setTimeout(u1TxRtsTimer, 5);
		Clock_start(u1TxRtsTimer);

	}

	if(linkPort->index >= linkPort->count)
	{
		// No more data to send - set delay for RTS / UART Mode change
	//	Clock_setTimeout(u1TxOneShot, 5);
	//	Clock_start(u1TxOneShot);
	}
	Log_info2("TXcb-en: EOFCounter = [%u] RTSCounter = [%u]",uart1DCB.EOFCounter, uart1DCB.RTSCounter);

}

//////////////////////////////////////////////////////////////////////////////
//////////////////////////////       SWI       ///////////////////////////////
//////////////////////////////////////////////////////////////////////////////
/*
 * UART1 TX Last Character RTS Delay Timer Function
 */
void u1RxFrameDetectFxn(void)
{
	Clock_stop(u1RxFrameDetect);
	Swi_post(u1RxDoneSwi);
}

void u1TxRtsTimerFxn(void)
{
	Clock_stop(u1TxRtsTimer);
	Swi_post(u1TxDoneSwi);
}
//void u1TxOneShotFxn(void)
//{
//	// Transmit shift register operations should now be completed
//	// Change driver RTS line for Receive mode
//	GPIO_write(Board_U1_RTS, MCB_IO_485_RX);
//
//	// Reset DCB for Receive
//	uart1DCB.count = 0;
//	uart1DCB.index = 0;
//	uart1DCB.txMode = FALSE;
//
//}


/*
 * ======== u1RxDoneSwiFxn ========
 *
 */
void u1RxDoneSwiFxn(void)
{
	uartDCB *dcb;
	uartDCB *linkPort;
	dcb = &uart1DCB;
	linkPort = portData[Board_UART1].portDCB;

	// Update Port Bytes Received Count
	dcb->bytesRX += dcb->count;

	// Process buffer if a port is linked to this port
	if(dcb->linkedPort != NULL)
	{
		// Linked - so let's pass RX Buffer to Linked Ports TX routine
		// Set Link port to TX Mode
		linkPort->txMode = TRUE;

		// Set link port's RS-485 Driver for TX
		GPIO_write(linkPort->RTS_pin, MCB_IO_485_TX);

		//Prepare DCB for TX Operation
		dcb->index = 0;

		// Update Linked Port's stats
		linkPort->bytesTX += dcb->count;

		// Start TX by sending the first byte from RX Port Buffer to TX Port
		UART_write(linkPort->handle, &(dcb->rxBuff[(dcb->index)++]), 1);

		// Set RTS Timeout Timer
		linkPort->RTSCounter = 2;
		Clock_stop(u1TxRtsTimer);
		Clock_setTimeout(u1TxRtsTimer, 5);
		Clock_start(u1TxRtsTimer);

	} else {
		// Message received on INACTIVE port - DISCARD
		dcb->count = 0;
		dcb->index = 0;
		dcb->txMode = FALSE;

		// Log Discarded Message
		dcb->lostBytesRx += dcb->count;
	}
}

/*
 * ======== u1TxDoneSwiFxn ========
 *
 */
void u1TxDoneSwiFxn(void)
{
	// Reset DCB for Receive
	uart1DCB.count = 0;
	uart1DCB.index = 0;
	uart1DCB.txMode = FALSE;

	GPIO_write(Board_U1_RTS, MCB_IO_485_RX);

	// Arm Receiver for next callback
    UART_read(uart1DCB.handle,  &uart1DCB.rxInChar, 1);
}


//////////////////////////////////////////////////////////////////////////////
//////////////////////////////      TASK       ///////////////////////////////
//////////////////////////////////////////////////////////////////////////////


/******************************************************************************\
* FUNCTIONS
\******************************************************************************/
/*
 * UART Initialization Function
 */
void uartDcbInit(void)
{

	portData[Board_UART0].portDCB = &uart0DCB;
	portData[Board_UART1].portDCB = &uart1DCB;
	portData[Board_UART2].portDCB = &uart2DCB;
	portData[Board_UART3].portDCB = &uart3DCB;
	portData[Board_UART4].portDCB = &uart4DCB;
	portData[Board_UART5].portDCB = &uart5DCB;
	portData[Board_UART6].portDCB = &uart6DCB;
	portData[Board_UART7].portDCB = &uart7DCB;

	/* UART 1 */
	uart1DCB.portOpened = FALSE;
	uart1DCB.uPorttype = ctMcuCmd;
    uart1DCB.txMode = FALSE;
    uart1DCB.RTS_pin = Board_U1_RTS;
    uart1DCB.linkedPort = NULL;
    uart1DCB.index = 0;
    uart1DCB.count = 0;
	uart1DCB.EOFCounter = -1;
	uart1DCB.RTSCounter = -1;
    uart1DCB.bytesRX = 0;
    uart1DCB.lostBytesRx = 0;
    uart1DCB.bytesTX = 0;

    UART_Params_init(&uart1DCB.params);
	uart1DCB.params.readMode = UART_MODE_CALLBACK;
	uart1DCB.params.readCallback = &uart1readCallback;
	uart1DCB.params.writeMode = UART_MODE_CALLBACK;
	uart1DCB.params.writeCallback = &uart1writeCallback;
	uart1DCB.params.writeDataMode = UART_DATA_BINARY;
	uart1DCB.params.readDataMode = UART_DATA_BINARY;
	uart1DCB.params.readReturnMode = UART_RETURN_FULL;
	uart1DCB.params.readEcho = UART_ECHO_OFF;
	uart1DCB.params.baudRate = 9600;
	uart1DCB.params.dataLength = UART_LEN_8;
	uart1DCB.params.parityType = UART_PAR_NONE;
	uart1DCB.params.stopBits = UART_STOP_ONE;

	uart1DCB.handle = UART_open(Board_UART1, &uart1DCB.params);
    if (uart1DCB.handle != NULL) {
    	uart1DCB.portOpened = TRUE;
    	//  Arm UART for first byte
   	    UART_read(uart1DCB.handle,  &uart1DCB.rxInChar, 1);
    	System_printf("UART Port 1 Opened.\n");
    } else {
    	System_printf("**** ERROR ****   UART Port 1 FAILED to Open.\n");
    }
	// Change driver RTS line for Receive mode
	GPIO_write(Board_U1_RTS, MCB_IO_485_RX);

    System_flush();

    //
    // !!!  TEMP SETUP FOR TESTING !!!
    //
    uart1DCB.linkedPort = &(uart1DCB);
}



/******************************************************************************\
*                           M     A     I     N
\******************************************************************************/
Int main(Void)
{
    /* Call board init functions */
    Board_initGeneral();
    Board_initGPIO();
    Board_initUART();
    uartDcbInit();

    /* Start BIOS */
    BIOS_start();

    return (0);
}

CFG FILE:

MCB_IO.C (Board Config File)

/*
* Copyright (c) 2013, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
*    notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
*    notice, this list of conditions and the following disclaimer in the
*    documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
*    its contributors may be used to endorse or promote products derived
*    from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

/*
* ======== MCB_IO.c ========
* This file is responsible for setting up the board specific items for the
* MCB_IO board.
*
* The following defines are used to determine which TI-RTOS peripheral drivers
* to include:
*     TI_DRIVERS_GPIO_INCLUDED
*     TI_DRIVERS_I2C_INCLUDED
*     TI_DRIVERS_SDSPI_INCLUDED
*     TI_DRIVERS_SPI_INCLUDED
*     TI_DRIVERS_UART_INCLUDED
*     TI_DRIVERS_WATCHDOG_INCLUDED
*     TI_DRIVERS_WIFI_INCLUDED
* These defines are created when a useModule is done on the driver in the
* application's .cfg file. The actual #define is in the application
* generated header file that is brought in via the xdc/cfg/global.h.
* For example the following in the .cfg file
*     var GPIO = xdc.useModule('ti.drivers.GPIO');
* Generates the following
*     #define TI_DRIVERS_GPIO_INCLUDED 1
* If there is no useModule of ti.drivers.GPIO, the constant is set to 0.
*
* Note: a useModule is generated in the .cfg file via the graphical
* configuration tool when the "Add xxx to my configuration" is checked
* or "Use xxx" is selected.
*/

#include <stdint.h>
#include <stdbool.h>
#include <inc/hw_memmap.h>
#include <inc/hw_types.h>
#include <inc/hw_ints.h>
#include <inc/hw_gpio.h>

#include <driverlib/gpio.h>
#include <driverlib/sysctl.h>
#include <driverlib/i2c.h>
#include <driverlib/ssi.h>
#include <driverlib/udma.h>
#include <driverlib/pin_map.h>

#include <xdc/std.h>
#include <xdc/cfg/global.h>
#include <xdc/runtime/Error.h>
#include <xdc/runtime/System.h>
#include <ti/sysbios/family/arm/m3/Hwi.h>

#include "MCB_IO.h"

#if ccs
#pragma DATA_ALIGN(MCB_IO_DMAControlTable, 1024)
#elif ewarm
#pragma data_alignment=1024
#endif

static tDMAControlTable MCB_IO_DMAControlTable[32];
static Bool DMA_initialized = FALSE;

/* Hwi_Struct used in the initDMA Hwi_construct call */
static Hwi_Struct hwiStruct;

/*
* ======== MCB_IO_errorDMAHwi ========
*/
static Void MCB_IO_errorDMAHwi(UArg arg)
{
    System_printf("DMA error code: %d\n", uDMAErrorStatusGet());
    uDMAErrorStatusClear();
    System_abort("DMA error!!");
}

/*
* ======== MCB_IO_initDMA ========
*/
Void MCB_IO_initDMA(Void)
{
    Error_Block eb;
    Hwi_Params hwiParams;

    if(!DMA_initialized){

        Error_init(&eb);

        Hwi_Params_init(&hwiParams);
        Hwi_construct(&(hwiStruct), INT_UDMAERR, MCB_IO_errorDMAHwi,
                      &hwiParams, &eb);
        if (Error_check(&eb)) {
            System_abort("Couldn't create DMA error hwi");
        }

        SysCtlPeripheralEnable(SYSCTL_PERIPH_UDMA);
        uDMAEnable();
        uDMAControlBaseSet(MCB_IO_DMAControlTable);

        DMA_initialized = TRUE;
    }
}

/*
* ======== MCB_IO_initGeneral ========
*/
Void MCB_IO_initGeneral(Void)
{
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART2);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART3);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART4);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART5);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART6);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART7);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C0);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C1);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
}

#if TI_DRIVERS_GPIO_INCLUDED
#include <ti/drivers/GPIO.h>

/* Callback functions for the GPIO interrupt example. */
Void gpioButtonFxn0(Void);
Void gpioButtonFxn1(Void);

/* GPIO configuration structure */
const GPIO_HWAttrs gpioHWAttrs[MCB_IO_GPIOCOUNT] = {
//    {GPIO_PORTF_BASE, GPIO_PIN_1, GPIO_OUTPUT}, /* MCB_IO_LED_RED */
//    {GPIO_PORTF_BASE, GPIO_PIN_2, GPIO_OUTPUT}, /* MCB_IO_LED_BLUE */
//    {GPIO_PORTF_BASE, GPIO_PIN_3, GPIO_OUTPUT}, /* MCB_IO_LED_GREEN */
//    {GPIO_PORTF_BASE, GPIO_PIN_4, GPIO_INPUT}, /* MCB_IO_GPIO_SW1 */
//    {GPIO_PORTF_BASE, GPIO_PIN_0, GPIO_INPUT}, /* MCB_IO_GPIO_SW2 */
        {GPIO_PORTF_BASE, GPIO_PIN_3, GPIO_INPUT},    /* MasterCommBoard_SFP0_DET */
        {GPIO_PORTF_BASE, GPIO_PIN_4, GPIO_INPUT},    /* MasterCommBoard_SFP1_DET */
        {GPIO_PORTD_BASE, GPIO_PIN_3, GPIO_INPUT},    /* MasterCommBoard_SPI2UART_IRQ */
        {GPIO_PORTF_BASE, GPIO_PIN_2, GPIO_OUTPUT}, /* MasterCommBoard_ENET_SW_CS */
        {GPIO_PORTD_BASE, GPIO_PIN_1, GPIO_OUTPUT}, /* MasterCommBoard_U0_RTS */
        {GPIO_PORTD_BASE, GPIO_PIN_0, GPIO_OUTPUT}, /* MasterCommBoard_U1_RTS */
        {GPIO_PORTF_BASE, GPIO_PIN_0, GPIO_OUTPUT}, /* MasterCommBoard_U2_RTS */
        {GPIO_PORTB_BASE, GPIO_PIN_7, GPIO_OUTPUT}, /* MasterCommBoard_U3_RTS */
        {GPIO_PORTD_BASE, GPIO_PIN_2, GPIO_OUTPUT}, /* MasterCommBoard_U4_RTS */
        {GPIO_PORTE_BASE, GPIO_PIN_3, GPIO_OUTPUT}, /* MasterCommBoard_U5_RTS */
        {GPIO_PORTF_BASE, GPIO_PIN_1, GPIO_OUTPUT}, /* MasterCommBoard_U6_RTS */
        {GPIO_PORTE_BASE, GPIO_PIN_2, GPIO_OUTPUT}, /* MasterCommBoard_U7_RTS */
};

/* Memory for the GPIO module to construct a Hwi */
Hwi_Struct callbackHwi;

/* GPIO callback structure to set callbacks for GPIO interrupts */
const GPIO_Callbacks MCB_IO_gpioPortFCallbacks = {
    GPIO_PORTF_BASE, INT_GPIOF, &callbackHwi,
    {gpioButtonFxn1, NULL, NULL, NULL, gpioButtonFxn0, NULL, NULL, NULL}
};

const GPIO_Config GPIO_config[] = {
    {&gpioHWAttrs[0]},
    {&gpioHWAttrs[1]},
    {&gpioHWAttrs[2]},
    {&gpioHWAttrs[3]},
    {&gpioHWAttrs[4]},
    {&gpioHWAttrs[5]},
    {&gpioHWAttrs[6]},
    {&gpioHWAttrs[7]},
    {&gpioHWAttrs[8]},
    {&gpioHWAttrs[9]},
    {&gpioHWAttrs[10]},
    {&gpioHWAttrs[11]},
    {NULL},
};

/*
* ======== MCB_IO_initGPIO ========
*/
Void MCB_IO_initGPIO(Void)
{
//    /* Setup the LED GPIO pins used */
//    GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_1); /* MCB_IO_LED_RED */
//    GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_2); /* MCB_IO_LED_GREEN */
//    GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_3); /* MCB_IO_LED_BLUE */
//
//    /* Setup the button GPIO pins used */
//    GPIOPinTypeGPIOInput(GPIO_PORTF_BASE, GPIO_PIN_4); /* MCB_IO_GPIO_SW1 */
//    GPIOPadConfigSet(GPIO_PORTF_BASE, GPIO_PIN_4, GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD_WPU);
//
//    /* PF0 requires unlocking before configuration */
//    HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
//    HWREG(GPIO_PORTF_BASE + GPIO_O_CR) |= GPIO_PIN_0;
//    GPIOPinTypeGPIOInput(GPIO_PORTF_BASE, GPIO_PIN_0); /* MCB_IO_GPIO_SW2 */
//    GPIOPadConfigSet(GPIO_PORTF_BASE, GPIO_PIN_0, GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD_WPU);
//    HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = GPIO_LOCK_M;

    /* MCB U0.RTS: Enable pin PD1 for GPIOOutput */
    GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_1);

    /* MCB U1.RTS: Enable pin PD0 for GPIOOutput */
    GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_0);

    /* MCB U2.RTS: Enable pin PF0 for GPIOOutput */
    /*First open the lock and select the bits we want to modify in the GPIO commit register. */
    HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
    HWREG(GPIO_PORTF_BASE + GPIO_O_CR) = 0x1;
    /*Now modify the configuration of the pins that we unlocked. */
    GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_0);

    /* MCB U3.RTS: Enable pin PB7 for GPIOOutput */
    GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_7);

    /* MCB U4.RTS: Enable pin PD2 for GPIOOutput */
    GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_2);

    /* MCB U5.RTS: Enable pin PE3 for GPIOOutput */
    GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_3);

    /* MCB U6.RTS: Enable pin PF1 for GPIOOutput */
    GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_1);

    /* MCB U7.RTS: Enable pin PE2 for GPIOOutput */
    GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_2);

    /* MCB ENET_SW_CS: Enable pin PF2 for GPIOOutput */
    GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_2);

    /* MCB SPI2UART.IRQ: Enable pin PD3 for GPIOInput */
    GPIOPinTypeGPIOInput(GPIO_PORTD_BASE, GPIO_PIN_3);

    /* MCB SFP0_DET: Enable pin PF3 for GPIOInput */
    GPIOPinTypeGPIOInput(GPIO_PORTF_BASE, GPIO_PIN_3);

    /* MCB SFP1_DET: Enable pin PF4 for GPIOInput */
    GPIOPinTypeGPIOInput(GPIO_PORTF_BASE, GPIO_PIN_4);

//    /* MCB SFP0_DIS: Enable pin PG2 for GPIOInput */
//    GPIOPinTypeGPIOInput(GPIO_PORTG_BASE, GPIO_PIN_2);
//
//    /* MCB SFP1_DIS: Enable pin PG3 for GPIOInput */
//    GPIOPinTypeGPIOInput(GPIO_PORTG_BASE, GPIO_PIN_3);
//
//    /* MCB TXERR0: Enable pin PG4 for GPIOInput */
//    GPIOPinTypeGPIOInput(GPIO_PORTG_BASE, GPIO_PIN_4);
//
//    /* MCB TXERR1: Enable pin PG5 for GPIOInput */
//    GPIOPinTypeGPIOInput(GPIO_PORTG_BASE, GPIO_PIN_5);
//
//    /* MCB GPIO.0: Enable pin PG1 for GPIOInput */
//    GPIOPinTypeGPIOInput(GPIO_PORTG_BASE, GPIO_PIN_1);
//
//    /* MCB GPIO.1: Enable pin PG0 for GPIOInput */
//    GPIOPinTypeGPIOInput(GPIO_PORTG_BASE, GPIO_PIN_0);

    /* MCB GPIO.2: Enable pin PB6 for GPIOInput */
    GPIOPinTypeGPIOInput(GPIO_PORTB_BASE, GPIO_PIN_6);

    /* MCB GPIO.3: Enable pin PB4 for GPIOInput */
    GPIOPinTypeGPIOInput(GPIO_PORTB_BASE, GPIO_PIN_4);

   /* MCB GPIO.4: Enable pin PB5 for GPIOInput */
    GPIOPinTypeGPIOInput(GPIO_PORTB_BASE, GPIO_PIN_5);

    /* Once GPIO_init is called, GPIO_config cannot be changed */
    GPIO_init();

//    GPIO_write(MCB_IO_LED_RED, MCB_IO_LED_OFF);
//    GPIO_write(MCB_IO_LED_GREEN, MCB_IO_LED_OFF);
//    GPIO_write(MCB_IO_LED_BLUE, MCB_IO_LED_OFF);

    GPIO_write(MCB_IO_ENET_SW_CS, MCB_IO_CS_FALSE);
    GPIO_write(MCB_IO_U0_RTS, MCB_IO_485_RX);
    GPIO_write(MCB_IO_U1_RTS, MCB_IO_485_RX);
    GPIO_write(MCB_IO_U2_RTS, MCB_IO_485_RX);
    GPIO_write(MCB_IO_U3_RTS, MCB_IO_485_RX);
    GPIO_write(MCB_IO_U4_RTS, MCB_IO_485_RX);
    GPIO_write(MCB_IO_U5_RTS, MCB_IO_485_RX);
    GPIO_write(MCB_IO_U6_RTS, MCB_IO_485_RX);
    GPIO_write(MCB_IO_U7_RTS, MCB_IO_485_RX);

}
#endif /* TI_DRIVERS_GPIO_INCLUDED */

#if TI_DRIVERS_I2C_INCLUDED
#include <ti/drivers/I2C.h>
#include <ti/drivers/i2c/I2CTiva.h>

/* I2C objects */
I2CTiva_Object i2cTivaObjects[MCB_IO_I2CCOUNT];

/* I2C configuration structure, describing which pins are to be used */
const I2CTiva_HWAttrs i2cTivaHWAttrs[MCB_IO_I2CCOUNT] = {
    {I2C1_BASE, INT_I2C1},
    {I2C3_BASE, INT_I2C3},
};

const I2C_Config I2C_config[] = {
    {&I2CTiva_fxnTable, &i2cTivaObjects[0], &i2cTivaHWAttrs[0]},
    {&I2CTiva_fxnTable, &i2cTivaObjects[1], &i2cTivaHWAttrs[1]},
    {NULL, NULL, NULL}
};

/*
* ======== MCB_IO_initI2C ========
*/
Void MCB_IO_initI2C(Void)
{
    /* I2C1 Init */
    /* Enable the peripheral */
    SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C1);

    /* Configure the appropriate pins to be I2C instead of GPIO. */
    GPIOPinConfigure(GPIO_PA6_I2C1SCL);
    GPIOPinConfigure(GPIO_PA7_I2C1SDA);
    GPIOPinTypeI2CSCL(GPIO_PORTA_BASE, GPIO_PIN_6);
    GPIOPinTypeI2C(GPIO_PORTA_BASE, GPIO_PIN_7);

    /* I2C3 Init */
    /* Enable the peripheral */
    SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C3);

    /* Configure the appropriate pins to be I2C instead of GPIO. */
    GPIOPinConfigure(GPIO_PD0_I2C3SCL);
    GPIOPinConfigure(GPIO_PD1_I2C3SDA);
    GPIOPinTypeI2CSCL(GPIO_PORTD_BASE, GPIO_PIN_0);
    GPIOPinTypeI2C(GPIO_PORTD_BASE, GPIO_PIN_1);

    /*
     * These GPIOs are connected to PD0 and PD1 and need to be brought into a
     * GPIO input state so they don't interfere with I2C communications.
     */
    GPIOPinTypeGPIOInput(GPIO_PORTB_BASE, GPIO_PIN_6);
    GPIOPinTypeGPIOInput(GPIO_PORTB_BASE, GPIO_PIN_7);

    I2C_init();
}
#endif /* TI_DRIVERS_I2C_INCLUDED */

#if TI_DRIVERS_SDSPI_INCLUDED
#include <ti/drivers/SDSPI.h>
#include <ti/drivers/sdspi/SDSPITiva.h>

/* SDSPI objects */
SDSPITiva_Object sdspiTivaobjects[MCB_IO_SDSPICOUNT];

/* SDSPI configuration structure, describing which pins are to be used */
const SDSPITiva_HWAttrs sdspiTivaHWattrs[MCB_IO_SDSPICOUNT] = {
    {
        SSI2_BASE,          /* SPI base address */

        GPIO_PORTB_BASE,    /* The GPIO port used for the SPI pins */
        GPIO_PIN_4,         /* SCK */
        GPIO_PIN_6,         /* MISO */
        GPIO_PIN_7,         /* MOSI */

        GPIO_PORTA_BASE,    /* Chip select port */
        GPIO_PIN_5,         /* Chip select pin */

        GPIO_PORTB_BASE,    /* GPIO TX port */
        GPIO_PIN_7,         /* GPIO TX pin */
    }
};

const SDSPI_Config SDSPI_config[] = {
    {&SDSPITiva_fxnTable, &sdspiTivaobjects[0], &sdspiTivaHWattrs[0]},
    {NULL, NULL, NULL}
};

/*
* ======== MCB_IO_initSDSPI ========
*/
Void MCB_IO_initSDSPI(Void)
{
    /* Enable the peripherals used by the SD Card */
    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2);

    /* Configure pad settings */
    GPIOPadConfigSet(GPIO_PORTB_BASE,
            GPIO_PIN_4 | GPIO_PIN_7,
            GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD);

    GPIOPadConfigSet(GPIO_PORTB_BASE,
            GPIO_PIN_6,
            GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD_WPU);

    GPIOPadConfigSet(GPIO_PORTA_BASE,
            GPIO_PIN_5,
            GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD);

    GPIOPinConfigure(GPIO_PB4_SSI2CLK);
    GPIOPinConfigure(GPIO_PB6_SSI2RX);
    GPIOPinConfigure(GPIO_PB7_SSI2TX);

    /*
     * These GPIOs are connected to PB6 and PB7 and need to be brought into a
     * GPIO input state so they don't interfere with SPI communications.
     */
    GPIOPinTypeGPIOInput(GPIO_PORTD_BASE, GPIO_PIN_0);
    GPIOPinTypeGPIOInput(GPIO_PORTD_BASE, GPIO_PIN_1);

    SDSPI_init();
}
#endif /* TI_DRIVERS_SDSPI_INCLUDED */

#if TI_DRIVERS_SPI_INCLUDED
#include <ti/drivers/SPI.h>
#include <ti/drivers/spi/SPITivaDMA.h>

/* SPI objects */
SPITivaDMA_Object spiTivaDMAobjects[MCB_IO_SPICOUNT];

/* SPI configuration structure, describing which pins are to be used */
const SPITivaDMA_HWAttrs spiTivaDMAHWAttrs[MCB_IO_SPICOUNT] = {
    {
        SSI0_BASE,
        INT_SSI0,
        UDMA_CHANNEL_SSI0RX,
        UDMA_CHANNEL_SSI0TX,
        uDMAChannelAssign,
        UDMA_CH10_SSI0RX,
        UDMA_CH11_SSI0TX
    },
    {
        SSI2_BASE,
        INT_SSI2,
        UDMA_SEC_CHANNEL_UART2RX_12,
        UDMA_SEC_CHANNEL_UART2TX_13,
        uDMAChannelAssign,
        UDMA_CH12_SSI2RX,
        UDMA_CH13_SSI2TX
    },
    {
        SSI3_BASE,
        INT_SSI3,
        UDMA_SEC_CHANNEL_TMR2A_14,
        UDMA_SEC_CHANNEL_TMR2B_15,
        uDMAChannelAssign,
        UDMA_CH14_SSI3RX,
        UDMA_CH15_SSI3TX
    }
};

const SPI_Config SPI_config[] = {
    {&SPITivaDMA_fxnTable, &spiTivaDMAobjects[0], &spiTivaDMAHWAttrs[0]},
    {&SPITivaDMA_fxnTable, &spiTivaDMAobjects[1], &spiTivaDMAHWAttrs[1]},
    {&SPITivaDMA_fxnTable, &spiTivaDMAobjects[2], &spiTivaDMAHWAttrs[2]},
    {NULL, NULL, NULL},
};

/*
* ======== MCB_IO_initSPI ========
*/
Void MCB_IO_initSPI(Void)
{
    /* SPI0 */
    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);

    /* Need to unlock PF0 */
    GPIOPinConfigure(GPIO_PA2_SSI0CLK);
    GPIOPinConfigure(GPIO_PA3_SSI0FSS);
    GPIOPinConfigure(GPIO_PA4_SSI0RX);
    GPIOPinConfigure(GPIO_PA5_SSI0TX);

    GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 |
                                    GPIO_PIN_4 | GPIO_PIN_5);

    /* SSI2 */
    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2);

    GPIOPinConfigure(GPIO_PB4_SSI2CLK);
    GPIOPinConfigure(GPIO_PB5_SSI2FSS);
    GPIOPinConfigure(GPIO_PB6_SSI2RX);
    GPIOPinConfigure(GPIO_PB7_SSI2TX);

    GPIOPinTypeSSI(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_5 |
                                    GPIO_PIN_6 | GPIO_PIN_7);

    /* SSI3 */
    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI3);

    GPIOPinConfigure(GPIO_PD0_SSI3CLK);
    GPIOPinConfigure(GPIO_PD1_SSI3FSS);
    GPIOPinConfigure(GPIO_PD2_SSI3RX);
    GPIOPinConfigure(GPIO_PD3_SSI3TX);

    GPIOPinTypeSSI(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1 |
                                    GPIO_PIN_2 | GPIO_PIN_3);

    MCB_IO_initDMA();
    SPI_init();
}
#endif /* TI_DRIVERS_SPI_INCLUDED */

#if TI_DRIVERS_UART_INCLUDED
#include <ti/drivers/UART.h>
#include <ti/drivers/uart/UARTTiva.h>

/* UART objects */
UARTTiva_Object uartTivaObjects[MCB_IO_UARTCOUNT];

/* UART configuration structure */
const UARTTiva_HWAttrs uartTivaHWAttrs[MCB_IO_UARTCOUNT] = {
        {UART0_BASE, INT_UART0}, /* MCB_IO_UART0 */
        {UART1_BASE, INT_UART1}, /* MCB_IO_UART1 */
        {UART2_BASE, INT_UART2}, /* MCB_IO_UART2 */
        {UART3_BASE, INT_UART3}, /* MCB_IO_UART3 */
        {UART4_BASE, INT_UART4}, /* MCB_IO_UART4 */
        {UART5_BASE, INT_UART5}, /* MCB_IO_UART5 */
        {UART6_BASE, INT_UART6}, /* MCB_IO_UART6 */
        {UART7_BASE, INT_UART7}, /* MCB_IO_UART7 */
};

const UART_Config UART_config[] = {
        { &UARTTiva_fxnTable, &uartTivaObjects[0], &uartTivaHWAttrs[0] },
        { &UARTTiva_fxnTable, &uartTivaObjects[1], &uartTivaHWAttrs[1] },
        { &UARTTiva_fxnTable, &uartTivaObjects[2], &uartTivaHWAttrs[2] },
        { &UARTTiva_fxnTable, &uartTivaObjects[3], &uartTivaHWAttrs[3] },
        { &UARTTiva_fxnTable, &uartTivaObjects[4], &uartTivaHWAttrs[4] },
        { &UARTTiva_fxnTable, &uartTivaObjects[5], &uartTivaHWAttrs[5] },
        { &UARTTiva_fxnTable, &uartTivaObjects[6], &uartTivaHWAttrs[6] },
        { &UARTTiva_fxnTable, &uartTivaObjects[7], &uartTivaHWAttrs[7] },
        {NULL, NULL, NULL}
};

/*
* ======== MCB_IO_initUART ========
*/
Void MCB_IO_initUART()
{
    /* Enable and configure the peripherals used by UART0. */
    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
    GPIOPinConfigure(GPIO_PA0_U0RX);
    GPIOPinConfigure(GPIO_PA1_U0TX);
    GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);

    /* Enable and configure the peripherals used by UART1. */
    GPIOPinConfigure(GPIO_PB1_U1TX);
    GPIOPinConfigure(GPIO_PB0_U1RX);
    GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0 | GPIO_PIN_1);

    /* Enable and configure the peripherals used by UART2. */
    GPIOPinConfigure(GPIO_PD6_U2RX);
    GPIOPinTypeUART(GPIO_PORTD_BASE, GPIO_PIN_6);
    // First open the lock and select the bits we want to modify in the GPIO commit register.
    HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
    HWREG(GPIO_PORTD_BASE + GPIO_O_CR) = 0x80;
    // Now modify the configuration of the pins that we unlocked.
    GPIOPinConfigure(GPIO_PD7_U2TX);
    GPIOPinTypeUART(GPIO_PORTD_BASE, GPIO_PIN_7);

    /* Enable and configure the peripherals used by UART3. */
    GPIOPinConfigure(GPIO_PC7_U3TX);
    GPIOPinConfigure(GPIO_PC6_U3RX);
    GPIOPinTypeUART(GPIO_PORTC_BASE, GPIO_PIN_6 | GPIO_PIN_7);

    /* Enable and configure the peripherals used by UART4. */
    GPIOPinConfigure(GPIO_PC5_U4TX);
    GPIOPinConfigure(GPIO_PC4_U4RX);
    GPIOPinTypeUART(GPIO_PORTC_BASE, GPIO_PIN_4 | GPIO_PIN_5);

    /* Enable and configure the peripherals used by UART5. */
    GPIOPinConfigure(GPIO_PE5_U5TX);
    GPIOPinConfigure(GPIO_PE4_U5RX);
    GPIOPinTypeUART(GPIO_PORTE_BASE, GPIO_PIN_4 | GPIO_PIN_5);

    /* Enable and configure the peripherals used by UART6. */
    GPIOPinConfigure(GPIO_PD4_U6RX);
    GPIOPinConfigure(GPIO_PD5_U6TX);
    GPIOPinTypeUART(GPIO_PORTD_BASE, GPIO_PIN_4 | GPIO_PIN_5);

    /* Enable and configure the peripherals used by UART7. */
    GPIOPinConfigure(GPIO_PE1_U7TX);
    GPIOPinConfigure(GPIO_PE0_U7RX);
    GPIOPinTypeUART(GPIO_PORTE_BASE, GPIO_PIN_0 | GPIO_PIN_1);

    /* Initialize the UART driver */
    UART_init();
}
#endif /* TI_DRIVERS_UART_INCLUDED */

/*
* ======== MCB_IO_initUSB ========
* This function just turns on the USB
*/
Void MCB_IO_initUSB(MCB_IO_USBMode usbMode)
{
    /* Enable the USB peripheral and PLL */
    SysCtlPeripheralEnable(SYSCTL_PERIPH_USB0);
    SysCtlUSBPLLEnable();

    /* Setup pins for USB operation */
    GPIOPinTypeUSBAnalog(GPIO_PORTD_BASE, GPIO_PIN_4 | GPIO_PIN_5);

    if (usbMode == MCB_IO_USBHOST) {
        System_abort("USB host not supported\n");
    }
}

#if TI_DRIVERS_WATCHDOG_INCLUDED
#include <ti/drivers/Watchdog.h>
#include <ti/drivers/watchdog/WatchdogTiva.h>

/* Watchdog objects */
WatchdogTiva_Object watchdogTivaObjects[MCB_IO_WATCHDOGCOUNT];

/* Watchdog configuration structure */
const WatchdogTiva_HWAttrs watchdogTivaHWAttrs[MCB_IO_WATCHDOGCOUNT] = {
    /* MCB_IO_WATCHDOG0 with 1 sec period at default CPU clock freq */
    {WATCHDOG0_BASE, INT_WATCHDOG, 80000000},
};

const Watchdog_Config Watchdog_config[] = {
    {&WatchdogTiva_fxnTable, &watchdogTivaObjects[0], &watchdogTivaHWAttrs[0]},
    {NULL, NULL, NULL},
};

/*
* ======== MCB_IO_initWatchdog ========
*
* NOTE: To use the other watchdog timer with base address WATCHDOG1_BASE,
*       an additional function call may need be made to enable PIOSC. Enabling
*       WDOG1 does not do this. Enabling another peripheral that uses PIOSC
*       such as ADC0 or SSI0, however, will do so. Example:
*
*       SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
*       SysCtlPeripheralEnable(SYSCTL_PERIPH_WDOG1);
*
*       See the following forum post for more information:
*       http://e2e.ti.com/support/microcontrollers/stellaris_arm_cortex-m3_microcontroller/f/471/p/176487/654390.aspx#654390
*/
Void MCB_IO_initWatchdog()
{
    /* Enable peripherals used by Watchdog */
    SysCtlPeripheralEnable(SYSCTL_PERIPH_WDOG0);

    /* Initialize the Watchdog driver */
    Watchdog_init();
}
#endif /* TI_DRIVERS_WATCHDOG_INCLUDED */

#if TI_DRIVERS_WIFI_INCLUDED
#include <ti/drivers/WiFi.h>
#include <ti/drivers/wifi/WiFiTivaCC3000.h>

/* WiFi objects */
WiFiTivaCC3000_Object wiFiTivaCC3000Objects[MCB_IO_WIFICOUNT];

/* WiFi configuration structure */
const WiFiTivaCC3000_HWAttrs wiFiTivaCC3000HWAttrs[MCB_IO_WIFICOUNT] = {
    { GPIO_PORTB_BASE, /* IRQ port */
      GPIO_PIN_2,      /* IRQ pin */
      INT_GPIOB,       /* IRQ port interrupt vector */

      GPIO_PORTE_BASE, /* CS port */
      GPIO_PIN_0,      /* CS pin */

      GPIO_PORTB_BASE, /* WLAN EN port */
      GPIO_PIN_5       /* WLAN EN pin */
    }
};

const WiFi_Config WiFi_config[] = {
    {
        &WiFiTivaCC3000_fxnTable,
        &wiFiTivaCC3000Objects[0],
        &wiFiTivaCC3000HWAttrs[0]
    },
    {NULL,NULL, NULL},
};

/*
* ======== MCB_IO_initWiFi ========
*/
Void MCB_IO_initWiFi(Void)
{
    /* Configure SSI2 */
    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2);

    GPIOPinConfigure(GPIO_PB4_SSI2CLK);
    GPIOPinConfigure(GPIO_PB6_SSI2RX);
    GPIOPinConfigure(GPIO_PB7_SSI2TX);

    GPIOPinTypeSSI(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_6 | GPIO_PIN_7);

    /* Call necessary SPI init functions */
    SPI_init();
    MCB_IO_initDMA();

    /* Initialize WiFi driver */
    WiFi_init();
}
#endif /* TI_DRIVERS_WIFI_INCLUDED */

MCB_IO.H

BOARD.H

Processors

Processors forum

RS-485 RX/TX on TM4C123's 8 UARTs