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Problem with Boot from flash - EVMC6748

Gaby Levy
Intellectual 410 points
Other Parts Discussed in Thread: OMAP-L138

Hi,

I am using document as example: http://software-dl.ti.com/trainingTTO/trainingTTO_public_sw/bios/BIOS_14b_Flash.pdf

I am using the following:

Board: EVMC6748 (I am using the TMS320C6748 DSP).

I am connected using the ethernet port to my router.

ccs: 5.4.0.00091

bios: 6_35_01_29

pspdrivers: 01_30_01

nsp: nsp_1_10_02_09

ndk: ndk_2_22_03_20

xdctools: 3_25_00_48

xgconf

---

When running the SPI Writter I chose N and then the bin file I created according the document.

1) After about 2 minutes only I get message "INFO: File read complete."

2) I waited additional 5 min, nothing else appears....

Any idea?

Thanks in advance!!!

  • 0
    TI__Guru** 116770 points

    Please describe your boot switch settings? Set them to no-boot mode when using the SPI Writer. Also load the GEL file in the target configuration when you load the SPI writer as you may need to configure the PLLs for the Device to run in full speed mode. IF you are in no-boot mode or SPI mode then the device PLL is probably in bypass mode and C6748 is running at 24 Mhz hence you are seeing the slow read  of the bin file and write to the SPI flash. 

    Please let us know if this resolves your issue.

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Intellectual 410 points

    Hi,

    The DIP SWITCH settings are:

    1 Off
    2 Off
    3 Off
    4 Off
    5 On
    6 Off
    7 Off
    8 On

    This means according the document that I am running with ccs debugger, which is what I am doing for running the SPIWRitter.

    Which GEL file shall I load? There is one I loaded mainly for the steps in the documents, which I downloaded from "http://processors.wiki.ti.com/index.php/OMAP-L1x_Debug_Gel_Files", is it OK? I did not do this step...

    So

    1) Put the DS as they are

    2) Load the SPIWRiter as I did

    3) Load the GEL File --- Did not try this one

    4) Then run.

    I will try the above,

    Thanks

    GBL

  • 0 in reply to Rahul Prabhu
    Intellectual 410 points

    I did what I wrote, it stills the same...

    I waited another 10 min, nothing else happens.

    Any idea?

    BR

    GBL

  • 0 in reply to Rahul Prabhu
    Intellectual 410 points

    One more thing...

    I paused the running of the application after about 30min,

    I see the following in the Debug tab view:

    UTL_waitLoopAccurate
    SPI_enableCS
    LOCAL_issueWRENCommand
    SPI_enableCS
    SPI_enableCS
    SPI_MEM_eraseBytes
    LOCAL_GetAndWriteFileData
    LOCAL_spiwriter
    main
    c_init00

    ---

    BR

    GBL

  • 0
    Intellectual 410 points

    Well eventually I managed to program the flash this way, but I still have a problem - it seems the unit is restarting again and again.

    This is what I did:

    1) DS status: 1=OFF, 2=ON, 3=OFF, 4=ON (According to document "L138/C6748 Development Kit (LCDK) - Texas Instruments Wiki")

    2) AIS I prepared telling the flash is NAND

    3) I used sfh utility: C:\BIOSv4\OMAP-L138_FlashAndBootUtils_2_40\OMAP-L138\GNU>sfh_OMAP-L138 -flash_noubl c:\BIOSv4\Labs\SensorPrj_NAND.bin -flashType NAND -targetType C6748_LCDK -p

    So, the tool says I managed to program the flash

    Then I put all DS in OFF state, but it seems the unit is restarting again and again.

    It can be some mapping issue? How do I test it? Is it possible to debug?

    Thanks in advance,

    GBL

  • 0 in reply to Gaby Levy
    TI__Mastermind 35645 points

    Hi Gaby,

    Thanks for your post.

    There are typical steps involved in using this sfh utility. Please check the below wiki article and kindly follow the same:

    http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138

    For custom boards, there would be custom changes required accordingly to modify it for the same and the modifcations required are mentioned in the above article.

    Also, there are multiple ways for flashing images to SPI, so, kindly refer the below aritcle for your reference:

    http://processors.wiki.ti.com/index.php/GSG:_OMAP-L138_DVEVM_Additional_Procedures#Flashing_images_to_SPI_Flash

    Thanks & regards,

    Sivaraj K

    -------------------------------------------------------------------------------------------------------
    Please click the Verify Answer button on this post if it answers your question.
    -------------------------------------------------------------------------------------------------------
  • 0 in reply to Gaby Levy
    TI__Guru** 116770 points

    Gaby,

    Can you explain why you set all the DS to OFF state. You should set the DS to NAND boot mode so that the device can boot. I am not sure why the device is restarting again and again as this is definitely not a software issue and it is hard for us to comment with out knowing your system as to how the unit will behave if it doesn`t boot.

    Can you connect to the device after setting the DS to NAND boot and let us know what the value of the Program counter you see. You can also run the debug GEL file on the device and see if the boot completed successfully and the application was loaded in memory.

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Intellectual 410 points

    Hi,

    I corrected the DS setting, I put it in NAND FLASH mode (first one off, the rest on), still same.

    I am trying to run the debug gel files in order to see what is going on.

    The oly way I manage to run it is if I first load my software to the device with the debugger, then I load the debugging gel... but I guess this way is not good enough as then it is running after code was loaded using the jtag...

    How can I run the gel files without first loading my code into the device?

    Issue is that when I am starting the debugger I am already getting to main, so it is not what running from flash adn not what we want to test...

    Anyway in case it helps I am attaching the diagnostics I got this way.

    Thanks in advance

    GBL

    Fullscreen 5241.gel.txt Download 
    C674X_0: Output: 	Target Connected.
C674X_0: Output: 	---------------------------------------------
C674X_0: Output: 	Memory Map Cleared.
C674X_0: Output: 	---------------------------------------------
C674X_0: Output: 	Memory Map Setup Complete.
C674X_0: Output: 	---------------------------------------------
C674X_0: Output: 	PSC Enable Complete.
C674X_0: Output: 	---------------------------------------------
C674X_0: Output: 	PLL0 init done for Core:300MHz, EMIFA:25MHz
C674X_0: Output: 	DDR initialization is in progress....
C674X_0: Output: 	PLL1 init done for DDR:150MHz
C674X_0: Output: 	Using DDR2 settings
C674X_0: Output: 	DDR2 init for 150 MHz is done
C674X_0: Output: 	---------------------------------------------
C674X_0: GEL Output: 
---------------------------------------------
C674X_0: GEL Output: |             Device Information            |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: DEV_INFO_00 = 0x1B7D102F
C674X_0: GEL Output: DEV_INFO_01 = 0x00000000
C674X_0: GEL Output: DEV_INFO_02 = 0x00000010
C674X_0: GEL Output: DEV_INFO_03 = 0x00000003
C674X_0: GEL Output: DEV_INFO_04 = 0x00000000
C674X_0: GEL Output: DEV_INFO_05 = 0x000003E0
C674X_0: GEL Output: DEV_INFO_06 = 0x00000080
C674X_0: GEL Output: DEV_INFO_07-DEV_INFO_08-DEV_INFO_09-DEV_INFO_10-DEV_INFO_11-DEV_INFO_12 = 0-0-6544787-11-11-16
C674X_0: GEL Output: DEV_INFO_13,DEV_INFO_14,DEV_INFO_15,DEV_INFO_16 = 3,0,0,874
C674X_0: GEL Output: -----
C674X_0: GEL Output: DEV_INFO_17 = 0x00030003
C674X_0: GEL Output: DEV_INFO_18 = 0x00000000
C674X_0: GEL Output: DEV_INFO_19 =C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 
C674X_0: GEL Output: -----
C674X_0: GEL Output: DEV_INFO_20 = 0x30303864
C674X_0: GEL Output: DEV_INFO_21 = 0x3830306B
C674X_0: GEL Output: DEV_INFO_22 = 0x00000000
C674X_0: GEL Output: DEV_INFO_23 = 0x00000000
C674X_0: GEL Output: -----
C674X_0: GEL Output: DEV_INFO_24 = 0x0B01000B
C674X_0: GEL Output: DEV_INFO_25 = 0x0063DD93
C674X_0: GEL Output: DEV_INFO_06 = 0x00000080
C674X_0: GEL Output: DEV_INFO_26 = 0x06D40003
C674X_0: GEL Output: 

C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |               BOOTROM Info                |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: ROM ID: d800k008 
C674X_0: GEL Output: Silicon Revision 2.1
C674X_0: GEL Output: Boot pins: 16
C674X_0: GEL Output: Boot Mode: NAND 16
C674X_0: GEL Output: 
ROM Status Code: 0x0000001A 
Description:C674X_0: GEL Output: NAND read page failed
C674X_0: GEL Output: 
Program Counter (PC) = 0xC04911E0
C674X_0: GEL Output: 
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |              Clock Information             |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: 
C674X_0: GEL Output: PLLs configured to utilize crystal.
C674X_0: GEL Output: ASYNC3 = PLL0_SYSCLK2
C674X_0: GEL Output: 
C674X_0: GEL Output: NOTE:  All clock frequencies in following PLL sections are based
C674X_0: GEL Output: off OSCIN = 24 MHz.  If that value does not match your hardware
C674X_0: GEL Output: you should change the #define in the top of the gel file, save it,
C674X_0: GEL Output: and then reload.
C674X_0: GEL Output: 
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |              PLL0 Information             |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: 
C674X_0: GEL Output: PLL0_SYSCLK1 = 300 MHz
C674X_0: GEL Output: PLL0_SYSCLK2 = 150 MHz
C674X_0: GEL Output: PLL0_SYSCLK3 = 25 MHz
C674X_0: GEL Output: PLL0_SYSCLK4 = 75 MHz
C674X_0: GEL Output: PLL0_SYSCLK5 = 100 MHz
C674X_0: GEL Output: PLL0_SYSCLK6 = 300 MHz
C674X_0: GEL Output: PLL0_SYSCLK7 = 50 MHz
C674X_0: GEL Output: 
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |              PLL1 Information             |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: 
C674X_0: GEL Output: PLL1_SYSCLK1 = 300 MHz
C674X_0: GEL Output: PLL1_SYSCLK2 = 150 MHz
C674X_0: GEL Output: PLL1_SYSCLK3 = 100 MHz
C674X_0: GEL Output: 
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |              PSC0 Information             |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: 
C674X_0: GEL Output: State Decoder:
C674X_0: GEL Output:  0 = SwRstDisable (reset asserted, clock off)
C674X_0: GEL Output:  1 = SyncReset (reset assered, clock on)
C674X_0: GEL Output:  2 = Disable (reset de-asserted, clock off)
C674X_0: GEL Output:  3 = Enable (reset de-asserted, clock on)
C674X_0: GEL Output: >3 = Transition in progress
C674X_0: GEL Output: 
C674X_0: GEL Output: Module 0:	EDMA3CC (0)        STATE = 3
C674X_0: GEL Output: Module 1:	EDMA3 TC0          STATE = 3
C674X_0: GEL Output: Module 2:	EDMA3 TC1          STATE = 3
C674X_0: GEL Output: Module 3:	EMIFA (BR7)        STATE = 3
C674X_0: GEL Output: Module 4:	SPI 0              STATE = 3
C674X_0: GEL Output: Module 5:	MMC/SD 0           STATE = 3
C674X_0: GEL Output: Module 6:	AINTC              STATE = 3
C674X_0: GEL Output: Module 7:	ARM RAM/ROM        STATE = 3
C674X_0: GEL Output: Module 9:	UART 0             STATE = 3
C674X_0: GEL Output: Module 10:	SCR 0 (BR0/1/2/8)  STATE = 3
C674X_0: GEL Output: Module 11:	SCR 1 (BR4)        STATE = 3
C674X_0: GEL Output: Module 12:	SCR 2 (BR3/5/6)    STATE = 3
C674X_0: GEL Output: Module 13:	PRUSS              STATE = 0
C674X_0: GEL Output: Module 14:	ARM                STATE = 0
C674X_0: GEL Output: Module 15:	DSP                STATE = 3
C674X_0: GEL Output: 
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |              PSC1 Information             |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: 
C674X_0: GEL Output: State Decoder:
C674X_0: GEL Output:  0 = SwRstDisable (reset asserted, clock off)
C674X_0: GEL Output:  1 = SyncReset (reset assered, clock on)
C674X_0: GEL Output:  2 = Disable (reset de-asserted, clock off)
C674X_0: GEL Output:  3 = Enable (reset de-asserted, clock on)
C674X_0: GEL Output: >3 = Transition in progress
C674X_0: GEL Output: 
C674X_0: GEL Output: Module 0:	EDMA3CC (1)        STATE = 3
C674X_0: GEL Output: Module 1:	USB0 (2.0)         STATE = 3
C674X_0: GEL Output: Module 2:	USB1 (1.1)         STATE = 3
C674X_0: GEL Output: Module 3:	GPIO               STATE = 3
C674X_0: GEL Output: Module 4:	UHPI               STATE = 3
C674X_0: GEL Output: Module 5:	EMAC               STATE = 3
C674X_0: GEL Output: Module 6:	DDR2 and SCR F3    STATE = 3
C674X_0: GEL Output: Module 7:	MCASP0 + FIFO      STATE = 3
C674X_0: GEL Output: Module 8:	SATA               STATE = 3
C674X_0: GEL Output: Module 9:	VPIF               STATE = 3
C674X_0: GEL Output: Module 10:	SPI 1              STATE = 3
C674X_0: GEL Output: Module 11:	I2C 1              STATE = 3
C674X_0: GEL Output: Module 12:	UART 1             STATE = 3
C674X_0: GEL Output: Module 13:	UART 2             STATE = 3
C674X_0: GEL Output: Module 14:	MCBSP0 + FIFO      STATE = 3
C674X_0: GEL Output: Module 15:	MCBSP1 + FIFO      STATE = 3
C674X_0: GEL Output: Module 16:	LCDC               STATE = 3
C674X_0: GEL Output: Module 17:	eHRPWM (all)       STATE = 3
C674X_0: GEL Output: Module 18:	MMC/SD 1           STATE = 3
C674X_0: GEL Output: Module 19:	UPP                STATE = 3
C674X_0: GEL Output: Module 20:	eCAP (all)         STATE = 3
C674X_0: GEL Output: Module 21:	EDMA3 TC2          STATE = 3
C674X_0: GEL Output: Module 24:	SCR-F0 Br-F0       STATE = 3
C674X_0: GEL Output: Module 25:	SCR-F1 Br-F1       STATE = 3
C674X_0: GEL Output: Module 26:	SCR-F2 Br-F2       STATE = 3
C674X_0: GEL Output: Module 27:	SCR-F6 Br-F3       STATE = 3
C674X_0: GEL Output: Module 28:	SCR-F7 Br-F4       STATE = 3
C674X_0: GEL Output: Module 29:	SCR-F8 Br-F5       STATE = 3
C674X_0: GEL Output: Module 30:	Br-F7 (DDR Contr)  STATE = 3
C674X_0: GEL Output: Module 31:	L3 RAM, SCR-F4, Br-F6 STATE = 3
C674X_0: GEL Output: 
---------------------------------------------
C674X_0: GEL Output: |             Device Information            |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: DEV_INFO_00 = 0x1B7D102F
C674X_0: GEL Output: DEV_INFO_01 = 0x00000000
C674X_0: GEL Output: DEV_INFO_02 = 0x00000010
C674X_0: GEL Output: DEV_INFO_03 = 0x00000003
C674X_0: GEL Output: DEV_INFO_04 = 0x00000000
C674X_0: GEL Output: DEV_INFO_05 = 0x000003E0
C674X_0: GEL Output: DEV_INFO_06 = 0x00000080
C674X_0: GEL Output: DEV_INFO_07-DEV_INFO_08-DEV_INFO_09-DEV_INFO_10-DEV_INFO_11-DEV_INFO_12 = 0-0-6544787-11-11-16
C674X_0: GEL Output: DEV_INFO_13,DEV_INFO_14,DEV_INFO_15,DEV_INFO_16 = 3,0,0,874
C674X_0: GEL Output: -----
C674X_0: GEL Output: DEV_INFO_17 = 0x00030003
C674X_0: GEL Output: DEV_INFO_18 = 0x00000000
C674X_0: GEL Output: DEV_INFO_19 =C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 
C674X_0: GEL Output: -----
C674X_0: GEL Output: DEV_INFO_20 = 0x30303864
C674X_0: GEL Output: DEV_INFO_21 = 0x3830306B
C674X_0: GEL Output: DEV_INFO_22 = 0x00000000
C674X_0: GEL Output: DEV_INFO_23 = 0x00000000
C674X_0: GEL Output: -----
C674X_0: GEL Output: DEV_INFO_24 = 0x0B01000B
C674X_0: GEL Output: DEV_INFO_25 = 0x0063DD93
C674X_0: GEL Output: DEV_INFO_06 = 0x00000080
C674X_0: GEL Output: DEV_INFO_26 = 0x06D40003
C674X_0: GEL Output: 

C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |               BOOTROM Info                |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: ROM ID: d800k008 
C674X_0: GEL Output: Silicon Revision 2.1
C674X_0: GEL Output: Boot pins: 16
C674X_0: GEL Output: Boot Mode: NAND 16
C674X_0: GEL Output: 
ROM Status Code: 0x00000020 
Description:C674X_0: GEL Output: Error code not recognized
C674X_0: GEL Output: 
Program Counter (PC) = 0xC048BA80
C674X_0: GEL Output: 
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |              Clock Information             |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: 
C674X_0: GEL Output: PLLs configured to utilize crystal.
C674X_0: GEL Output: ASYNC3 = PLL0_SYSCLK2
C674X_0: GEL Output: 
C674X_0: GEL Output: NOTE:  All clock frequencies in following PLL sections are based
C674X_0: GEL Output: off OSCIN = 24 MHz.  If that value does not match your hardware
C674X_0: GEL Output: you should change the #define in the top of the gel file, save it,
C674X_0: GEL Output: and then reload.
C674X_0: GEL Output: 
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |              PLL0 Information             |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: 
C674X_0: GEL Output: PLL0_SYSCLK1 = 300 MHz
C674X_0: GEL Output: PLL0_SYSCLK2 = 150 MHz
C674X_0: GEL Output: PLL0_SYSCLK3 = 25 MHz
C674X_0: GEL Output: PLL0_SYSCLK4 = 75 MHz
C674X_0: GEL Output: PLL0_SYSCLK5 = 100 MHz
C674X_0: GEL Output: PLL0_SYSCLK6 = 300 MHz
C674X_0: GEL Output: PLL0_SYSCLK7 = 50 MHz
C674X_0: GEL Output: 
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |              PLL1 Information             |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: 
C674X_0: GEL Output: PLL1_SYSCLK1 = 300 MHz
C674X_0: GEL Output: PLL1_SYSCLK2 = 150 MHz
C674X_0: GEL Output: PLL1_SYSCLK3 = 100 MHz
C674X_0: GEL Output: 
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |              PSC0 Information             |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: 
C674X_0: GEL Output: State Decoder:
C674X_0: GEL Output:  0 = SwRstDisable (reset asserted, clock off)
C674X_0: GEL Output:  1 = SyncReset (reset assered, clock on)
C674X_0: GEL Output:  2 = Disable (reset de-asserted, clock off)
C674X_0: GEL Output:  3 = Enable (reset de-asserted, clock on)
C674X_0: GEL Output: >3 = Transition in progress
C674X_0: GEL Output: 
C674X_0: GEL Output: Module 0:	EDMA3CC (0)        STATE = 3
C674X_0: GEL Output: Module 1:	EDMA3 TC0          STATE = 3
C674X_0: GEL Output: Module 2:	EDMA3 TC1          STATE = 3
C674X_0: GEL Output: Module 3:	EMIFA (BR7)        STATE = 3
C674X_0: GEL Output: Module 4:	SPI 0              STATE = 3
C674X_0: GEL Output: Module 5:	MMC/SD 0           STATE = 3
C674X_0: GEL Output: Module 6:	AINTC              STATE = 3
C674X_0: GEL Output: Module 7:	ARM RAM/ROM        STATE = 3
C674X_0: GEL Output: Module 9:	UART 0             STATE = 3
C674X_0: GEL Output: Module 10:	SCR 0 (BR0/1/2/8)  STATE = 3
C674X_0: GEL Output: Module 11:	SCR 1 (BR4)        STATE = 3
C674X_0: GEL Output: Module 12:	SCR 2 (BR3/5/6)    STATE = 3
C674X_0: GEL Output: Module 13:	PRUSS              STATE = 0
C674X_0: GEL Output: Module 14:	ARM                STATE = 0
C674X_0: GEL Output: Module 15:	DSP                STATE = 3
C674X_0: GEL Output: 
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |              PSC1 Information             |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: 
C674X_0: GEL Output: State Decoder:
C674X_0: GEL Output:  0 = SwRstDisable (reset asserted, clock off)
C674X_0: GEL Output:  1 = SyncReset (reset assered, clock on)
C674X_0: GEL Output:  2 = Disable (reset de-asserted, clock off)
C674X_0: GEL Output:  3 = Enable (reset de-asserted, clock on)
C674X_0: GEL Output: >3 = Transition in progress
C674X_0: GEL Output: 
C674X_0: GEL Output: Module 0:	EDMA3CC (1)        STATE = 3
C674X_0: GEL Output: Module 1:	USB0 (2.0)         STATE = 3
C674X_0: GEL Output: Module 2:	USB1 (1.1)         STATE = 3
C674X_0: GEL Output: Module 3:	GPIO               STATE = 3
C674X_0: GEL Output: Module 4:	UHPI               STATE = 3
C674X_0: GEL Output: Module 5:	EMAC               STATE = 3
C674X_0: GEL Output: Module 6:	DDR2 and SCR F3    STATE = 3
C674X_0: GEL Output: Module 7:	MCASP0 + FIFO      STATE = 3
C674X_0: GEL Output: Module 8:	SATA               STATE = 3
C674X_0: GEL Output: Module 9:	VPIF               STATE = 3
C674X_0: GEL Output: Module 10:	SPI 1              STATE = 3
C674X_0: GEL Output: Module 11:	I2C 1              STATE = 3
C674X_0: GEL Output: Module 12:	UART 1             STATE = 3
C674X_0: GEL Output: Module 13:	UART 2             STATE = 3
C674X_0: GEL Output: Module 14:	MCBSP0 + FIFO      STATE = 3
C674X_0: GEL Output: Module 15:	MCBSP1 + FIFO      STATE = 3
C674X_0: GEL Output: Module 16:	LCDC               STATE = 3
C674X_0: GEL Output: Module 17:	eHRPWM (all)       STATE = 3
C674X_0: GEL Output: Module 18:	MMC/SD 1           STATE = 3
C674X_0: GEL Output: Module 19:	UPP                STATE = 3
C674X_0: GEL Output: Module 20:	eCAP (all)         STATE = 3
C674X_0: GEL Output: Module 21:	EDMA3 TC2          STATE = 3
C674X_0: GEL Output: Module 24:	SCR-F0 Br-F0       STATE = 3
C674X_0: GEL Output: Module 25:	SCR-F1 Br-F1       STATE = 3
C674X_0: GEL Output: Module 26:	SCR-F2 Br-F2       STATE = 3
C674X_0: GEL Output: Module 27:	SCR-F6 Br-F3       STATE = 3
C674X_0: GEL Output: Module 28:	SCR-F7 Br-F4       STATE = 3
C674X_0: GEL Output: Module 29:	SCR-F8 Br-F5       STATE = 3
C674X_0: GEL Output: Module 30:	Br-F7 (DDR Contr)  STATE = 3
C674X_0: GEL Output: Module 31:	L3 RAM, SCR-F4, Br-F6 STATE = 3

  • 0 in reply to Gaby Levy
    TI__Guru** 116770 points

    Hi Gaby,

    You can connect to the device without loading any code on it. Under Mneu File go to New -> Target file configuration. Select the emulator and the device in the fields and save the target configuration. Now go to View -> Target configurations. You should see the configuration you created in the View. Right click on the target configuration and launch the target configuration. Power on the device and then connect to the core. This should show you the state of the device after it tries to boot. Then follow the process of loading the debug GEL file as shown here:

    http://processors.wiki.ti.com/index.php/OMAP-L1x_Debug_Gel_Files

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Intellectual 410 points

    Hi,,,

    I will write exactly the details:

    1) The DS are according to c6748_LCDK which is what I have, so uart are [0123]=[OFF ON OFF ON]

    2) I create usin the AIS bin file - for NAND flash 16 bit, this actually helped solving part of the problem.

    Currently what I see is that my main starts (I put there some ouput to uart port, I am getting this) however there is a problem with BIOS start (I put in a task an output to  the uart, I am not getting it).

    Attached is the debug gel data.

    As for my map file (if needed), it starts like this:

    OUTPUT FILE NAME: <SensorPrj.out>
    ENTRY POINT SYMBOL: "_c_int00" address: c0051b80


    MEMORY CONFIGURATION

    name origin length used unused attr fill
    ---------------------- -------- --------- -------- -------- ---- --------
    IROM 11700000 00100000 00000000 00100000 R X
    IRAM 11800000 00040000 00000000 00040000 RW X
    L3_CBA_RAM 80000000 00020000 00000000 00020000 RW X
    DDR c0000000 08000000 000ccfdf 07f33021 RWIX

    Fullscreen 1727.debug_gel.txt Download 
    C674X_0: Output: 	Target Connected.
C674X_0: Output: 	---------------------------------------------
C674X_0: Output: 	Memory Map Cleared.
C674X_0: Output: 	---------------------------------------------
C674X_0: Output: 	Memory Map Setup Complete.
C674X_0: Output: 	---------------------------------------------
C674X_0: Output: 	PSC Enable Complete.
C674X_0: Output: 	---------------------------------------------
C674X_0: Output: 	PLL0 init done for Core:300MHz, EMIFA:25MHz
C674X_0: Output: 	DDR initialization is in progress....
C674X_0: Output: 	PLL1 init done for DDR:150MHz
C674X_0: Output: 	Using DDR2 settings
C674X_0: Output: 	DDR2 init for 150 MHz is done
C674X_0: Output: 	---------------------------------------------
C674X_0: GEL Output: 
---------------------------------------------
C674X_0: GEL Output: |             Device Information            |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: DEV_INFO_00 = 0x1B7D102F
C674X_0: GEL Output: DEV_INFO_01 = 0x00000000
C674X_0: GEL Output: DEV_INFO_02 = 0x00000010
C674X_0: GEL Output: DEV_INFO_03 = 0x00000003
C674X_0: GEL Output: DEV_INFO_04 = 0x00000000
C674X_0: GEL Output: DEV_INFO_05 = 0x000003E0
C674X_0: GEL Output: DEV_INFO_06 = 0x00000080
C674X_0: GEL Output: DEV_INFO_07-DEV_INFO_08-DEV_INFO_09-DEV_INFO_10-DEV_INFO_11-DEV_INFO_12 = 0-0-6544787-11-11-16
C674X_0: GEL Output: DEV_INFO_13,DEV_INFO_14,DEV_INFO_15,DEV_INFO_16 = 3,0,0,874
C674X_0: GEL Output: -----
C674X_0: GEL Output: DEV_INFO_17 = 0x00030003
C674X_0: GEL Output: DEV_INFO_18 = 0x00000000
C674X_0: GEL Output: DEV_INFO_19 =C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 
C674X_0: GEL Output: -----
C674X_0: GEL Output: DEV_INFO_20 = 0x30303864
C674X_0: GEL Output: DEV_INFO_21 = 0x3830306B
C674X_0: GEL Output: DEV_INFO_22 = 0x00000000
C674X_0: GEL Output: DEV_INFO_23 = 0x00000000
C674X_0: GEL Output: -----
C674X_0: GEL Output: DEV_INFO_24 = 0x0B01000B
C674X_0: GEL Output: DEV_INFO_25 = 0x0063DD93
C674X_0: GEL Output: DEV_INFO_06 = 0x00000080
C674X_0: GEL Output: DEV_INFO_26 = 0x06D40003
C674X_0: GEL Output: 

C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |               BOOTROM Info                |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: ROM ID: d800k008 
C674X_0: GEL Output: Silicon Revision 2.1
C674X_0: GEL Output: Boot pins: 16
C674X_0: GEL Output: Boot Mode: NAND 16
C674X_0: GEL Output: 
ROM Status Code: 0x00000000 
Description:C674X_0: GEL Output: No error
C674X_0: GEL Output: 
Program Counter (PC) = 0xC00319D8
C674X_0: GEL Output: 
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |              Clock Information             |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: 
C674X_0: GEL Output: PLLs configured to utilize crystal.
C674X_0: GEL Output: ASYNC3 = PLL0_SYSCLK2
C674X_0: GEL Output: 
C674X_0: GEL Output: NOTE:  All clock frequencies in following PLL sections are based
C674X_0: GEL Output: off OSCIN = 24 MHz.  If that value does not match your hardware
C674X_0: GEL Output: you should change the #define in the top of the gel file, save it,
C674X_0: GEL Output: and then reload.
C674X_0: GEL Output: 
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |              PLL0 Information             |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: 
C674X_0: GEL Output: PLL0_SYSCLK1 = 300 MHz
C674X_0: GEL Output: PLL0_SYSCLK2 = 150 MHz
C674X_0: GEL Output: PLL0_SYSCLK3 = 25 MHz
C674X_0: GEL Output: PLL0_SYSCLK4 = 75 MHz
C674X_0: GEL Output: PLL0_SYSCLK5 = 100 MHz
C674X_0: GEL Output: PLL0_SYSCLK6 = 300 MHz
C674X_0: GEL Output: PLL0_SYSCLK7 = 50 MHz
C674X_0: GEL Output: 
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |              PLL1 Information             |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: 
C674X_0: GEL Output: PLL1_SYSCLK1 = 300 MHz
C674X_0: GEL Output: PLL1_SYSCLK2 = 150 MHz
C674X_0: GEL Output: PLL1_SYSCLK3 = 100 MHz
C674X_0: GEL Output: 
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |              PSC0 Information             |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: 
C674X_0: GEL Output: State Decoder:
C674X_0: GEL Output:  0 = SwRstDisable (reset asserted, clock off)
C674X_0: GEL Output:  1 = SyncReset (reset assered, clock on)
C674X_0: GEL Output:  2 = Disable (reset de-asserted, clock off)
C674X_0: GEL Output:  3 = Enable (reset de-asserted, clock on)
C674X_0: GEL Output: >3 = Transition in progress
C674X_0: GEL Output: 
C674X_0: GEL Output: Module 0:	EDMA3CC (0)        STATE = 3
C674X_0: GEL Output: Module 1:	EDMA3 TC0          STATE = 3
C674X_0: GEL Output: Module 2:	EDMA3 TC1          STATE = 3
C674X_0: GEL Output: Module 3:	EMIFA (BR7)        STATE = 3
C674X_0: GEL Output: Module 4:	SPI 0              STATE = 3
C674X_0: GEL Output: Module 5:	MMC/SD 0           STATE = 3
C674X_0: GEL Output: Module 6:	AINTC              STATE = 3
C674X_0: GEL Output: Module 7:	ARM RAM/ROM        STATE = 3
C674X_0: GEL Output: Module 9:	UART 0             STATE = 3
C674X_0: GEL Output: Module 10:	SCR 0 (BR0/1/2/8)  STATE = 3
C674X_0: GEL Output: Module 11:	SCR 1 (BR4)        STATE = 3
C674X_0: GEL Output: Module 12:	SCR 2 (BR3/5/6)    STATE = 3
C674X_0: GEL Output: Module 13:	PRUSS              STATE = 0
C674X_0: GEL Output: Module 14:	ARM                STATE = 0
C674X_0: GEL Output: Module 15:	DSP                STATE = 3
C674X_0: GEL Output: 
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: |              PSC1 Information             |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: 
C674X_0: GEL Output: State Decoder:
C674X_0: GEL Output:  0 = SwRstDisable (reset asserted, clock off)
C674X_0: GEL Output:  1 = SyncReset (reset assered, clock on)
C674X_0: GEL Output:  2 = Disable (reset de-asserted, clock off)
C674X_0: GEL Output:  3 = Enable (reset de-asserted, clock on)
C674X_0: GEL Output: >3 = Transition in progress
C674X_0: GEL Output: 
C674X_0: GEL Output: Module 0:	EDMA3CC (1)        STATE = 3
C674X_0: GEL Output: Module 1:	USB0 (2.0)         STATE = 3
C674X_0: GEL Output: Module 2:	USB1 (1.1)         STATE = 3
C674X_0: GEL Output: Module 3:	GPIO               STATE = 3
C674X_0: GEL Output: Module 4:	UHPI               STATE = 3
C674X_0: GEL Output: Module 5:	EMAC               STATE = 3
C674X_0: GEL Output: Module 6:	DDR2 and SCR F3    STATE = 3
C674X_0: GEL Output: Module 7:	MCASP0 + FIFO      STATE = 3
C674X_0: GEL Output: Module 8:	SATA               STATE = 3
C674X_0: GEL Output: Module 9:	VPIF               STATE = 3
C674X_0: GEL Output: Module 10:	SPI 1              STATE = 3
C674X_0: GEL Output: Module 11:	I2C 1              STATE = 3
C674X_0: GEL Output: Module 12:	UART 1             STATE = 3
C674X_0: GEL Output: Module 13:	UART 2             STATE = 3
C674X_0: GEL Output: Module 14:	MCBSP0 + FIFO      STATE = 3
C674X_0: GEL Output: Module 15:	MCBSP1 + FIFO      STATE = 3
C674X_0: GEL Output: Module 16:	LCDC               STATE = 3
C674X_0: GEL Output: Module 17:	eHRPWM (all)       STATE = 3
C674X_0: GEL Output: Module 18:	MMC/SD 1           STATE = 3
C674X_0: GEL Output: Module 19:	UPP                STATE = 3
C674X_0: GEL Output: Module 20:	eCAP (all)         STATE = 3
C674X_0: GEL Output: Module 21:	EDMA3 TC2          STATE = 3
C674X_0: GEL Output: Module 24:	SCR-F0 Br-F0       STATE = 3
C674X_0: GEL Output: Module 25:	SCR-F1 Br-F1       STATE = 3
C674X_0: GEL Output: Module 26:	SCR-F2 Br-F2       STATE = 3
C674X_0: GEL Output: Module 27:	SCR-F6 Br-F3       STATE = 3
C674X_0: GEL Output: Module 28:	SCR-F7 Br-F4       STATE = 3
C674X_0: GEL Output: Module 29:	SCR-F8 Br-F5       STATE = 3
C674X_0: GEL Output: Module 30:	Br-F7 (DDR Contr)  STATE = 3
C674X_0: GEL Output: Module 31:	L3 RAM, SCR-F4, Br-F6 STATE = 3

    Please advice...

    GBL

  • 0 in reply to Rahul Prabhu
    Intellectual 410 points

    Hi,

    Eventually I managed to solve this way:

    1) I had incorrect flash configuration in the ais gen (needed to be 16)

    2) Important: The ais gen does not save correctly the PSC1 values, so those that were configured before were not there.... this is why when I activated part of the bios the app stopped working.

    In order to "fix this" I edited manually the configuration file...

    Anyway those are the values:

    LPSC0 Enable=0+1+2+3+4+5+6+9+10+11+12+15
    LPSC1 Enable=0+1+2+3+4+5+6+7+9+10+11+12+13+14+15+16+17+18+19+20+21+24+25+26+27+28+29+30+31

    Thanks for all...

    GBL

  • 0 in reply to Gaby Levy
    TI__Guru** 116770 points

    Thanks for posting the response Gaby. We are currently investigating the PSC1 configuration issue. I will let you know when we resolve the issue and a new release is available for you to try.

    Regards,

    Rahul