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1GB DDR3 memory configuration in ti81xx

jish jay
Prodigy 130 points

Other Parts Discussed in Thread: DM8107

Hi,

I am using ti8107 with two 512MB DDR3 and changed

"u-boot-dvr-rdk/include/configs/ti8107_dvr.h"

#define CONFIG_NR_DRAM_BANKS           2               /* we have 2 banks of DRAM */
#define PHYS_DRAM_1                    0x80000000      /* DRAM Bank #1 */
#define PHYS_DRAM_1_SIZE               0x20000000      /* 512 MB */
#define PHYS_DRAM_2                    0xA0000000      /* DRAM Bank #2 */
#define PHYS_DRAM_2_SIZE               0x20000000      /* 512 MB */

and LISA settings

"/arch/arm/include/asm/arch-ti81xx/ddr_defs_ti814x.h"

#define PG2_1_DMM_LISA_MAP__0       0x80640300      
#define PG2_1_DMM_LISA_MAP__1       0xA0640300
#define PG2_1_DMM_LISA_MAP__2       0x80640300
#define PG2_1_DMM_LISA_MAP__3       0xA0640300

Is anything to be done from uboot side for 1GB support?

Can i use the below default settings for this case?Also why LISA_MAP  four priorities needed?

#define CONFIG_NR_DRAM_BANKS        1
#define PHYS_DRAM_1                 0x80000000  /* DRAM Bank #1 */
#define PHYS_DRAM_1_SIZE            0x40000000  /* 1 GB */

#define PG2_1_DMM_LISA_MAP__0       0x0
#define PG2_1_DMM_LISA_MAP__1       0x0
#define PG2_1_DMM_LISA_MAP__2       0x0
#define PG2_1_DMM_LISA_MAP__3       0x80640300

  • 0
    TI__Guru**** 170625 points

    Jish,

    I'm working with DM814x/AM387x device, thus I have no view over the DM8107 device, but I will try to provide you some pointers.

    For 1GB DDR3, you can have a look in the below wiki page, it is for EZSDK, but for DVR RDK should be similar:

    http://processors.wiki.ti.com/index.php/EZSDK_Memory_Map

    For 1GB (512MB on EMIF0 and 512MB on EMIF1), the PHYS_DRAM_x definitions should be:

    #define CONFIG_NR_DRAM_BANKS           2               /* we have 2 banks of DRAM */
     #define PHYS_DRAM_1                          0x80000000      /* DRAM Bank #1 */
    #define PHYS_DRAM_1_SIZE                  0x20000000      /* 512 MB */
    #define PHYS_DRAM_2                           0xA0000000      /* DRAM Bank #2 */
    #define PHYS_DRAM_2_SIZE                  0x20000000      /* 512 MB */

    Best regards,
    Pavel

  • 0
    TI__Guru**** 170625 points

    jish jay said:
    #define PG2_1_DMM_LISA_MAP__0       0x0
    #define PG2_1_DMM_LISA_MAP__1       0x0
    #define PG2_1_DMM_LISA_MAP__2       0x0
    #define PG2_1_DMM_LISA_MAP__3       0x80640300

    These are correct settings for 1GB DDR3 memory. This is the default u-boot code for 1GB DDR3 for DM814x device:

    u-boot-x/include/asm/arch-ti81xx/ddr_defs_ti814x.h

    /*
     * TI814X PG2.1 DMM LISA MAPPING
     * 1G contiguous section with 128-byte interleaving
     */
    #define PG2_1_DMM_LISA_MAP__0        0x0
    #define PG2_1_DMM_LISA_MAP__1        0x0
    #define PG2_1_DMM_LISA_MAP__2        0x0
    #define PG2_1_DMM_LISA_MAP__3        0x80640300

    jish jay said:
    Also why LISA_MAP  four priorities needed?

    You can check for LISA priorities details in the DM8107 TRM, chapter DMM/TILER

    Best regards,
    Pavel

  • 0 in reply to Pavel Botev
    Prodigy 130 points

    Hi Pavel,

    Thanks for the reply.

    For my case there will be two 512MB DDR3 , so in that case also can i use the default configuration?

    #define PG2_1_DMM_LISA_MAP__0        0x0
    #define PG2_1_DMM_LISA_MAP__1        0x0
    #define PG2_1_DMM_LISA_MAP__2        0x0
    #define PG2_1_DMM_LISA_MAP__3        0x80640300

    Thanks

    Jishnu

     

     

  • 0 in reply to jish jay
    TI__Guru**** 170625 points

    Jishnu,

    The DM81xx device have two DDR3/EMIF controllers. Each DDR3/EMIF controller can support up to 1GB, thus 2GB DDR3 memory total. If you mean that you will attach 512MB to DDR3/EMIF controller 0 and 512MB to DDR3/EMIF controller 1, then this default configuration should work fine.

    Best regards,
    Pavel

  • 0 in reply to Pavel Botev
    Prodigy 130 points

    Thanks Pavel for the valuable answer

  • 0 in reply to jish jay
    Prodigy 130 points

    Hi Pavel,

    How to configure these values ?

    u-boot-dvr-rdk/include/asm/arch-ti81xx/ddr_defs_ti814x.h

    #define DDR3_EMIF_READ_LATENCY     
    #define DDR3_EMIF_TIM1         
    #define DDR3_EMIF_TIM2         
    #define DDR3_EMIF_TIM3         
    #define DDR3_EMIF_REF_CTRL     
    #define DDR3_EMIF_SDRAM_CONFIG     
    #define DDR3_EMIF_SDRAM_ZQCR       

    i want to check the default values with my new DDR3 configuration. Also want to cross verify the values. Is any doc supporting this?

    Also is any other macros need to be changed to support my new DDR3?

    Thanks in advance

    Jishnu

  • 0 in reply to jish jay
    TI__Guru**** 170625 points

    Jishnu,

    You are using DM8107 based custom board (not TI EVM), right?

    Regards,
    Pavel

  • 0 in reply to Pavel Botev
    Prodigy 130 points

    yes DM8107 custom board

  • 0 in reply to jish jay
    TI__Guru**** 170625 points

    Follow the guidelines provided by Sivagamy in your other e2e thread:

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/p/317886/1105686.aspx#1105686

    Best regards,
    Pavel

  • 0 in reply to Pavel Botev
    Prodigy 130 points

    Thanks Pavel

  • 0 in reply to jish jay
    Guru 20755 points
    Hi,

    I use the same setting as in this posts, yet I get the same data in 0x80000000 and in 0xa0000000.

    Thanks for any idea,
    Ran