Dear TI.
We use C6654 in our design. And we don't need its PCI-E and SGMII port. We just use UPP DDR MII MCBSP SPI port.
Can I just supply a 50MHz LVDS clock to CORECLK and DDRCLK? and terminate the SRIOSGMIICLK and PCIECLK as suggested by the Hardware Design Guide for Keystone Devices
Best Regards,
York
