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OMAP L138 ARM-DSP COMMUNICATION ISSUE USING BOOTLOADER

Other Parts Discussed in Thread: OMAPL138, OMAP-L138

Hi,

i am a beginnner in this field.am using logicpd experimenter kit omapl138.I tried flashing the sample ARM-DSP-LED programs provided by TI.The combined binary file is perfectly working with ROM BOOTLOADER,after flashing to SPI1 FLASH memory.Now,i tried with my required application in which ARM and DSP has to interrupt each other in between.my code is working properly with JTAG,but when i converted the out files to a combined binary and wrote to Flash,its not working properly with bootloader.In my application,ARM has to interrupt DSP after performing some task and DSP after performing some task has to interrupt back ARM.In our observation,DSP is getting initialised but its not getting interrupted by  ARM and moreover,ARM is getting restarted.i am providing with my DSP command file  and configuration file uesd in AIS.

-stack 0x5000
-heap 0x400

MEMORY
{
        L1P:         o = 00e00000h   l = 00008000h    /* 32k */
        L1D:         o = 00f00000h   l = 00008000h    /* 32k */
        L2_VECTS:   o = 00800000h   l = 000002FFh    /* 2MB */
        SCRATCH:   o = 11800300h   l = 000001FFh
        L2:            o = 11800500h   l = 0003FB00h
        entry_point:  o = 80010000h l = 00000080h   
        SR:          o = 80010080h   l = 0001FF9Fh    /* Shared ram*/
}

SECTIONS
{
    vectors        >        0x00800000, RUN_START(_ISTP_START)
    scratch        >        SCRATCH
    .text:_c_int00 > entry_point
    .text       >       SR
    .stack      >       SR
    .bss        >       L2
    .cinit      >       L1D
    .cio        >       L2
    .const      >       L2
    .data       >       L2
    .switch     >       L1D
    .sysmem     >       L2
    .far        >       L2
    
    SectRxDemodBuf         >    L2
  /*  SectRxFiltDemodBuf    >    L2*/
}

CONFIGURATION FILE

Boot Mode=SPI1 Flash
Boot Speed=1
Flash Width=0
Flash Timing=3ffffffc
Configure Peripheral=True
Configure PLL0=True
Configure SDRAM=False
Configure PLL1=True
Configure DDR2=True
Configure LPSC=True
Configure Pinmux=True
Enable CRC=False
Specify Entrypoint=False
Enable Sequential Read=False
Use 4.5 Clock Divider=False
Use DDR2 Direct Clock=False
Use mDDR=True
Use DuplicateMddrSetting=False
ROM ID=3
Device Type=0
Input Clock Speed=24
Clock Type=0
PLL0 Pre Divider=1
PLL0 Multiplier=25
PLL0 Post Divider=2
PLL0 Div1=1
PLL0 Div3=3
PLL0 Div7=6
PLL1 Multiplier=25
PLL1 Post Divider=2
PLL1 Div1=1
PLL1 Div2=2
PLL1 Div3=3
Entrypoint=0
SDRAM SDBCR=0
SDRAM SDTMR=0
SDRAM SDRSRPDEXIT=0
SDRAM SDRCR=0
DDR2 PHY=c4
DDR2 SDCR=2034622
DDR2 SDCR2=0
DDR2 SDTIMR=20923248
DDR2 SDTIMR2=38141400
DDR2 SDRCR=493
LPSC0 Enable=6+7+14+15+
LPSC0 Disable=
LPSC0 SyncRst=
LPSC1 Enable=6+10+13+
LPSC1 Disable=
LPSC1 SyncRst=
Pinmux=0:44000000+4:220000+
App File String=
AIS File Name=

A detailed response is highly appreciated.

Thanks

ELDHO

  • Hi Eldho,

    1. Did you flash your application image with or without UBL ?

    http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138

    • Flash the memory with a single application image - This will place an application image at address 0x0 of the flash. This must be an AIS format binary, which can be created with the AISgen utilities bundled with the Bootloader User Guide and associated files.
      • ..\sfh_OMAP-L138.exe -flash_noubl <binary application file>
    • Flash the memory with a UBL and application image - This will place a UBL at address 0x0 of the flash and an application image, such as u-boot, at address 0x10000. In general, a UBL is not required, and this mode is only used when restoring the default flash contents, as explained in the following section.
      • ..\sfh_OMAP-L138.exe -flash <UBL binary file> <binary application file>

     

    Meanwhile, I will get back to you regarding your configurations.

     

    Regards,

    Shankari

     

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  • hi,

    thanks for the response..anyways it got solved..the problem was with command file..vectors was not pointed to entry point address and there was l2 ram memory allocation problem.

    we have not used UBL  while flashing.

    Regards,

    eldho

  • this is modified dsp command file

    -stack 0x5000

    -heap 0x1000

    MEMORY

    {

    L1P: o = 00e00000h  l = 00008000h /* 32k */

    L1D: o = 00f00000h  l = 00008000h /* 32k */

    L2_VECTS: o = 00800000h  l = 000002FFh /* 2MB */

    SCRATCH: o = 11800300h  l = 000001FFh

    L2: o = 11800500h  l = 0003FB00h

    entry_point: o = 80010000h  l = 00001000h

    SR: o = 80011000h  l = 0001FF9Fh /* Shared ram*/

    }

    SECTIONS

    {

    vectors > entry_point

    scratch > SCRATCH

    .text > SR

    .const > L2 .cinit > L2

    .bss > L2 .sysmem > L2

    .stack > L2 .cio > L2

    .data > L2 .switch > L2

    .far > L2

    }

    regards,

    eldho