GPMC disabled after MMU initialization.

Using Segger embOS on the BeagleBone board with IAR.

When running out of DDR as soon as the MMU is enabled by the OS the GPMC register area is unavailable. The CM-PER_GPMC_CLKCTRL is still showing 0x02 for module mode and the status is idle. All is OK until the MMU is enabled.

I am using the GPMC for an FPGA memory mapped interface and just need one chip select and 1 MByte of address space.

Is there any way to have the MMU working with the GPMC for my desired purpose?

Below is the Segger MMU TLB initialization code, during the OS_ARM_MMU_Enable routine the GMPC becomes disabled, I do not have the source for the OS. Any suggestions are appreciated.

OS_ARM_MMU_InitTT(_TranslationTable);
  //                                         Mode                      VAddr  PAddr  Size[MB]
  OS_ARM_MMU_AddTTEntries(_TranslationTable, OS_ARM_CACHEMODE_ILLEGAL, 0x000, 0x000, 0x402);    // Unmapped area
  OS_ARM_MMU_AddTTEntries(_TranslationTable, OS_ARM_CACHEMODE_C_B,     0x402, 0x402, 0x001);    // internal SRAM (48kByte), 1 MB (program area)
  OS_ARM_MMU_AddTTEntries(_TranslationTable, OS_ARM_CACHEMODE_C_B,     0x403, 0x403, 0x001);    // internal SRAM (64kByte), 1 MB (program area)
  OS_ARM_MMU_AddTTEntries(_TranslationTable, OS_ARM_CACHEMODE_ILLEGAL, 0x404, 0x404, 0x03C);    // Unmapped area
  OS_ARM_MMU_AddTTEntries(_TranslationTable, OS_ARM_CACHEMODE_NC_NB,   0x440, 0x440, 0x0C0);    // SFRs, non cacheable, non bufferable
  OS_ARM_MMU_AddTTEntries(_TranslationTable, OS_ARM_CACHEMODE_ILLEGAL, 0x500, 0x500, 0x180);    // Unmapped area
  OS_ARM_MMU_AddTTEntries(_TranslationTable, OS_ARM_CACHEMODE_NC_NB,   0x680, 0x680, 0x080);    // L3 Interconnect (128 MByte)
  OS_ARM_MMU_AddTTEntries(_TranslationTable, OS_ARM_CACHEMODE_ILLEGAL, 0x700, 0x700, 0x100);    // Unmapped area
  OS_ARM_MMU_AddTTEntries(_TranslationTable, OS_ARM_CACHEMODE_C_B,     0x800, 0x800, 0x100);    // external SDRAM (256 MByte), 1 MB (program area)
  OS_ARM_MMU_AddTTEntries(_TranslationTable, OS_ARM_CACHEMODE_ILLEGAL, 0x900, 0x900, 0x700);    // Unmapped area

  OS_ARM_MMU_Enable      (_TranslationTable);
  OS_ARM_ICACHE_Enable();
  OS_ARM_DCACHE_Enable();