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What's the difference between the First Order and Second Order CDR ?

xi su
Intellectual 725 points

What's the difference between the First Order and Second Order CDR ?

I was confused by the <SerDes Implementation Guide for KeyStone I Devices>  :(

  • 0
    TI__Intellectual 1805 points

    Su,

    Can you be more specific on your problem?

    If it is for how to select, the table-9 (for AIF2, SRIO, or HyperLink) and table-17 (for PCIe and SGMII) show how.

    If it is for what is the performance difference and when to use them, the UG said - the first order algorithm can be configured to operate at a reduced activity level to save power at the expense of phase tracking rate (see page 29).

    Regards!
    Wen

  • 0 in reply to Wenzhong Liu
    Intellectual 725 points

    It is said "The twelve votes are then summed, and an action to adjust the position of the sampling clock occurs if
    the difference between early and late vote s exceeds a programmable threshold"(SerDes Implementation Guide for KeyStone I Devices P29) , but it is also said "The majority vote from each voting window is used to adjust a signed counter  (increment if majority late, decrement if majority early, no change if a tie). Whenever  the magnitude of the counter reaches the specified threshold, the sampling position is  adjusted by 1 / 48 UI."(Page 30)

    I was confused the sampling position is  adjusted  for one voting window or for many voting window when the threshold is reached?