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How to set up L2 as cache using XDC script in tms320c6678

sijomon parakkal
Intellectual 655 points
Other Parts Discussed in Thread: SYSBIOS

Hi,

I wish to enable L2 cache at startup to its maximum using XDC script.

Also Please try to give the code if it is done in the code.

regards,

Sijomon

  • 0
    TI__Guru* 81335 points

    Hi Sijomon,


    Moved this thread to correct(TI-RTOS) forum for faster response.

    Thanks.

  • 0
    TI__Mastermind 20480 points

    Sijomon,

    What version of SYS/BIOS are you using?

    have you tried adding var Cache = xdc.useModule('ti.sysbios.family.c66.Cache'); into your .cfg file?

  • 0 in reply to Tom Kopriva
    Intellectual 655 points

    SYS/BIOS Version 6.35.1.29

    In my platform file I have set L2SRAM in cache mode.

    What I read from the SYS/BIOS manual is that if it is done so, then the XDC will do the necessary to setup L2PCFG in order to make it work as cache. But it is seen that this register is not set. Then I had to write the code for changing it cache and plugged it as start-up function. Then everything was fine.  What I wish to know is that, whether will it be automatically taken care if enabled .If not, is it possible to do it in the XDC Script?. Then what is that script? 

    Doing via C code has been experimented.

    instead of calling  c66.cache module, would hal.cache be sufficient for this purpose? Anyway that was also done. Still L2PCFG was not setup.

    regards,

    Sijomon

  • 0 in reply to sijomon parakkal
    TI__Mastermind 32475 points

    Hi Sijomon,

    This is working fine on my evm6678 board.  I created my own platform, set the L2 Cache to "512K" and when I run the program and it gets to main(), the cache L2CFG shows the LSB as a 0x5 which means it is "512K"

    Make sure nothing else is coming by to overwrite this info in your program.

    Judah

  • 0 in reply to judahvang
    Intellectual 675 points

    Hi Judah,

    I also expected this behavior. I am uploading the print screen of my version. Here it is shown as 0K. I have set my L2 as cache while making platform configuration file. If required I can show that also.

    regards,

    Sijomon

  • 0 in reply to Pratheek Suresh
    TI__Mastermind 32475 points

    Hi,

    I'm pretty sure one of the other packages that you are using must be overriding the Cache settings.

    One thing to try if you can is use a Hardware watchpoint of the cache L2 cfg address 0x01840000 to see what software packages are writing the cache bits.

    If you still can't figure it out make a cut down version of your program that reproduces the problem and attach it here and I can try it on my end.

    Judah