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I am having an issue displaying at 1080i59.94 and 720p59,94 on the 8107. I am using the following timings:
#define VDIS_TIMINGS_1080I_59 "74176,1920/88/148/44,1080/2/15/5,0"
#define VDIS_TIMINGS_720P_59 "74176,1280/110/220/40,720/5/20/5,1"
Both result in a split display output as shown below. Is there some way to make the VENC handle 59.94 clocks for these resolutions on the 8107?
Attached patch is required for 1080i60 support. Patch applies on top of DVRRDK 4.1.
diff --git a/demos/mcfw_api_demos/mcfw_demo/demo_display.c b/demos/mcfw_api_demos/mcfw_demo/demo_display.c
index 4083d7f..8c9ab3f 100755
--- a/demos/mcfw_api_demos/mcfw_demo/demo_display.c
+++ b/demos/mcfw_api_demos/mcfw_demo/demo_display.c
@@ -1096,7 +1096,7 @@ int Demo_displaySettings(int demoId)
break;
}
printf(gDemo_ResolutionMenu);
- resolution = Demo_getIntValue("Display Id", 1, 8, 1);
+ resolution = Demo_getIntValue("Display Id", 1,10, 1);
switch(resolution) {
case 1:
if (displayId != VDIS_DEV_SD)
@@ -1197,6 +1197,28 @@ int Demo_displaySettings(int demoId)
}
}
break;
+ case 9:
+ if (displayId != VDIS_DEV_SD)
+ {
+ resolution = VSYS_STD_1080I_60;
+ validRes = TRUE;
+ }
+ else
+ {
+ printf("\n Resolution Not supported !!\n");
+ }
+ break;
+ case 10:
+ if (displayId != VDIS_DEV_SD)
+ {
+ resolution = VSYS_STD_1080I_50;
+ validRes = TRUE;
+ }
+ else
+ {
+ printf("\n Resolution Not supported !!\n");
+ }
+ break;
default:
resolution = VSYS_STD_1080P_60;
diff --git a/mcfw/interfaces/ti_vdis_timings.h b/mcfw/interfaces/ti_vdis_timings.h
index 237de76..9022786 100755
--- a/mcfw/interfaces/ti_vdis_timings.h
+++ b/mcfw/interfaces/ti_vdis_timings.h
@@ -101,6 +101,8 @@ static inline int Vdis_sysfsWrite(char *fileName, char *val)
#define VDIS_TIMINGS_576P "27000,720/12/68/64,576/5/39/5,1"
#define VDIS_TIMINGS_VGA_CEA "25200,640/16/48/96,480/9/34/2,1"
#define VDIS_TIMINGS_VGA_VESA "25175,640/16/48/96,480/11/31/2,1"
+#define VDIS_TIMINGS_1080I_60 "74250,1920/88/148/44,1080/2/15/5,0"
+#define VDIS_TIMINGS_1080I_50 "74250,1920/528/148/44,1080/2/15/5,0"
#define VDIS_MODE_NTSC "ntsc"
#define VDIS_MODE_PAL "pal"
diff --git a/mcfw/src_bios6/links_m3vpss/display/displayLink_drv.c b/mcfw/src_bios6/links_m3vpss/display/displayLink_drv.c
index dc36103..8769f5d 100755
--- a/mcfw/src_bios6/links_m3vpss/display/displayLink_drv.c
+++ b/mcfw/src_bios6/links_m3vpss/display/displayLink_drv.c
@@ -55,17 +55,19 @@ static inline Bool DisplayLink_drvIsDeiDisplayDrv(DisplayLink_Obj * pObj)
}
static
-Bool DisplayLink_drvIsSDDef(DisplayLink_Obj * pObj)
+Bool DisplayLink_drvIsInterlacedDislay(UInt32 displayRes)
{
- Bool isSdDef = FALSE;
+ Bool isInterlacedDisplay = FALSE;
- if ((VSYS_STD_NTSC == pObj->createArgs.displayRes)
+ if ((VSYS_STD_NTSC == displayRes)
||
- (VSYS_STD_PAL == pObj->createArgs.displayRes))
+ (VSYS_STD_PAL == displayRes)
+ ||
+ (VSYS_STD_1080I_60 == displayRes))
{
- isSdDef = TRUE;
+ isInterlacedDisplay = TRUE;
}
- return isSdDef;
+ return isInterlacedDisplay;
}
static
@@ -73,7 +75,7 @@ Bool DisplayLink_drvDoInputPitchDoubling(DisplayLink_Obj * pObj)
{
Bool doPitchDouble = FALSE;
- if (DisplayLink_drvIsSDDef(pObj)
+ if (DisplayLink_drvIsInterlacedDislay(pObj->createArgs.displayRes)
&&
pObj->displayFormat.fieldMerged[0] == FALSE
&&
@@ -905,7 +907,14 @@ Int32 DisplayLink_drvSetResolution(DisplayLink_Obj *pObj, UInt32 resolution)
resolution,
&pObj->deiDispPrms.scTarWidth,
&pObj->deiDispPrms.scTarHeight);
-
+ if (DisplayLink_drvIsInterlacedDislay(resolution))
+ {
+ pObj->deiDispPrms.fmt.scanFormat = FVID2_SF_INTERLACED;
+ }
+ else
+ {
+ pObj->deiDispPrms.fmt.scanFormat = FVID2_SF_PROGRESSIVE;
+ }
status = DisplayLink_drvSetDeiDispPrmsIctl(pObj);
}
else
@@ -913,13 +922,21 @@ Int32 DisplayLink_drvSetResolution(DisplayLink_Obj *pObj, UInt32 resolution)
System_getOutSize(resolution,
&pObj->displayFormat.width,
&pObj->displayFormat.height);
-
+ if (DisplayLink_drvIsInterlacedDislay(resolution))
+ {
+ pObj->displayFormat.scanFormat = FVID2_SF_INTERLACED;
+ }
+ else
+ {
+ pObj->deiDispPrms.fmt.scanFormat = FVID2_SF_PROGRESSIVE;
+ }
status = FVID2_setFormat(
pObj->displayHndl,
&pObj->displayFormat);
}
UTILS_assert(status == FVID2_SOK);
+ pObj->createArgs.displayRes = resolution;
return(status);
}
@@ -1080,7 +1097,7 @@ Int32 DisplayLink_drvDisplayCreate(DisplayLink_Obj * pObj)
pFormat->scanFormat = FVID2_SF_INTERLACED;
pFormat->fieldMerged[0] = TRUE;
- if (DisplayLink_drvIsSDDef(pObj))
+ if (DisplayLink_drvIsInterlacedDislay(pObj->createArgs.displayRes))
{
for (i = 0; i < pObj->createArgs.numInputQueues; i++)
{
@@ -1158,10 +1175,12 @@ Bool DisplayLink_drvIsFieldSeparatedInput(DisplayLink_Obj * pObj,
Bool isFieldSeparatedInput = FALSE;
UInt32 fieldMergedHeightNTSC;
UInt32 fieldMergedHeightPAL;
+ UInt32 fieldMergedHeight1080I;
- UTILS_assert(DisplayLink_drvIsSDDef(pObj) == TRUE);
+ UTILS_assert(DisplayLink_drvIsInterlacedDislay(pObj->createArgs.displayRes) == TRUE);
fieldMergedHeightNTSC = 240;
fieldMergedHeightPAL = 288;
+ fieldMergedHeight1080I = 1080;
pObj->enableFieldSeparatedInputMode = FALSE;
@@ -1172,7 +1191,9 @@ Bool DisplayLink_drvIsFieldSeparatedInput(DisplayLink_Obj * pObj,
{
if ((queInfo->chInfo[0].height == fieldMergedHeightNTSC)
||
- (queInfo->chInfo[0].height == fieldMergedHeightPAL))
+ (queInfo->chInfo[0].height == fieldMergedHeightPAL)
+ ||
+ (queInfo->chInfo[0].height == fieldMergedHeight1080I))
{
isFieldSeparatedInput = TRUE;
}
@@ -1199,7 +1220,7 @@ Void DisplayLink_drvSetFieldSeparatedInfo(DisplayLink_Obj * pObj)
status = System_linkGetInfo(pPrm->inQueParams[i].prevLinkId,
&pObj->inTskInfo[i]);
UTILS_assert(status == FVID2_SOK);
- if (DisplayLink_drvIsSDDef(pObj))
+ if (DisplayLink_drvIsInterlacedDislay(pObj->createArgs.displayRes))
{
pObj->fieldInput[i] =
DisplayLink_drvIsFieldSeparatedInput (pObj,
diff --git a/mcfw/src_bios6/links_m3vpss/system/system_dctrl.c b/mcfw/src_bios6/links_m3vpss/system/system_dctrl.c
index 7de649b..819118d 100755
--- a/mcfw/src_bios6/links_m3vpss/system/system_dctrl.c
+++ b/mcfw/src_bios6/links_m3vpss/system/system_dctrl.c
@@ -34,10 +34,12 @@ Vps_DcConfig gSystem_dctrlTriDisplayConfigDvo2 = {
{VPS_DC_GRPX0_INPUT_PATH, VPS_DC_HDMI_BLEND} ,
{VPS_DC_GRPX1_INPUT_PATH, VPS_DC_HDCOMP_BLEND} ,
{VPS_DC_GRPX1_INPUT_PATH, VPS_DC_DVO2_BLEND},
- {VPS_DC_GRPX2_INPUT_PATH, VPS_DC_HDMI_BLEND}
- }
+ {VPS_DC_GRPX2_INPUT_PATH, VPS_DC_HDMI_BLEND},
+ {VPS_DC_MAIN_INPUT_PATH, VPS_DC_VCOMP},
+ {VPS_DC_AUX_INPUT_PATH, VPS_DC_HDCOMP_MUX}
+ }
,
- 13,
+ 15,
/* VENC information */
{
/* Mode information */
@@ -92,9 +94,11 @@ Vps_DcConfig gSystem_dctrlTriDisplayConfigHdmi = {
{VPS_DC_GRPX0_INPUT_PATH, VPS_DC_HDCOMP_BLEND},
{VPS_DC_GRPX1_INPUT_PATH, VPS_DC_DVO2_BLEND},
{VPS_DC_GRPX2_INPUT_PATH, VPS_DC_SDVENC_BLEND},
- {VPS_DC_GRPX2_INPUT_PATH, VPS_DC_HDMI_BLEND}
+ {VPS_DC_GRPX2_INPUT_PATH, VPS_DC_HDMI_BLEND},
+ {VPS_DC_MAIN_INPUT_PATH, VPS_DC_VCOMP},
+ {VPS_DC_AUX_INPUT_PATH, VPS_DC_HDCOMP_MUX}
} ,
- 14,
+ 16,
/* VENC information */
{
/* Mode information */
diff --git a/mcfw/src_linux/mcfw_api/ti_vdis.c b/mcfw/src_linux/mcfw_api/ti_vdis.c
index c4e5514..e68cfdc 100755
--- a/mcfw/src_linux/mcfw_api/ti_vdis.c
+++ b/mcfw/src_linux/mcfw_api/ti_vdis.c
@@ -2034,6 +2034,12 @@ Int32 Vdis_setResolution(VDIS_DEV devId, UInt32 resolution)
case VSYS_STD_VGA_60:
Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDMI, VDIS_TIMINGS_VGA_CEA);
break;
+ case VSYS_STD_1080I_60:
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDMI, VDIS_TIMINGS_1080I_60);
+ break;
+ case VSYS_STD_1080I_50:
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDMI, VDIS_TIMINGS_1080I_50);
+ break;
default:
printf("\n Resolution not supported for HDMI!! \n");
break;
@@ -2061,6 +2067,12 @@ Int32 Vdis_setResolution(VDIS_DEV devId, UInt32 resolution)
case VSYS_STD_SXGA_60:
Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDCOMP, VDIS_TIMINGS_SXGA_60);
break;
+ case VSYS_STD_1080I_60:
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDCOMP, VDIS_TIMINGS_1080I_60);
+ break;
+ case VSYS_STD_1080I_50:
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDCOMP, VDIS_TIMINGS_1080I_50);
+ break;
default:
printf("\n Resolution not supported for HDCOMP!! \n");
break;
@@ -2086,6 +2098,12 @@ Int32 Vdis_setResolution(VDIS_DEV devId, UInt32 resolution)
case VSYS_STD_SXGA_60:
Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_DVO2, VDIS_TIMINGS_SXGA_60);
break;
+ case VSYS_STD_1080I_60:
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_DVO2, VDIS_TIMINGS_1080I_60);
+ break;
+ case VSYS_STD_1080I_50:
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_DVO2, VDIS_TIMINGS_1080I_50);
+ break;
default:
printf("\n Resolution not supported for DVO2!! \n");
break;
@@ -2238,6 +2256,14 @@ Int32 Vdis_setResolution(VDIS_DEV devId, UInt32 resolution)
Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDCOMP, VDIS_TIMINGS_576P);
Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_DVO2 , VDIS_TIMINGS_576P);
break;
+ case VSYS_STD_1080I_60:
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDCOMP, VDIS_TIMINGS_1080I_60);
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_DVO2, VDIS_TIMINGS_1080I_60);
+ break;
+ case VSYS_STD_1080I_50:
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDCOMP, VDIS_TIMINGS_1080I_60);
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_DVO2, VDIS_TIMINGS_1080I_50);
+ break;
default:
printf("\n Resolution not supported for this Venc!! \n");
break;
@@ -2281,6 +2307,12 @@ Int32 Vdis_setResolution(VDIS_DEV devId, UInt32 resolution)
case VSYS_STD_VGA_60:
Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDMI, VDIS_TIMINGS_VGA_CEA);
break;
+ case VSYS_STD_1080I_60:
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDMI, VDIS_TIMINGS_1080I_60);
+ break;
+ case VSYS_STD_1080I_50:
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDMI, VDIS_TIMINGS_1080I_50);
+ break;
default:
printf("\n Resolution not supported for HDMI!! \n");
break;
@@ -2338,6 +2370,14 @@ Int32 Vdis_setResolution(VDIS_DEV devId, UInt32 resolution)
Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDCOMP, VDIS_TIMINGS_VGA_CEA);
Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDMI, VDIS_TIMINGS_VGA_CEA);
break;
+ case VSYS_STD_1080I_60:
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDCOMP, VDIS_TIMINGS_1080I_60);
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDMI, VDIS_TIMINGS_1080I_60);
+ break;
+ case VSYS_STD_1080I_50:
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDCOMP, VDIS_TIMINGS_1080I_50);
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_HDMI, VDIS_TIMINGS_1080I_50);
+ break;
default:
printf("\n Resolution not supported for HDMI!! \n");
break;
@@ -2379,6 +2419,12 @@ Int32 Vdis_setResolution(VDIS_DEV devId, UInt32 resolution)
case VSYS_STD_576P:
Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_DVO2 , VDIS_TIMINGS_576P);
break;
+ case VSYS_STD_1080I_60:
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_DVO2, VDIS_TIMINGS_1080I_60);
+ break;
+ case VSYS_STD_1080I_50:
+ Vdis_sysfsCmd(3,VDIS_SYSFSCMD_SETTIMINGS, VDIS_SYSFS_DVO2, VDIS_TIMINGS_1080I_50);
+ break;
default:
printf("\n Resolution not supported for DVO2!! \n");
break;
Pls check the items below after applying patch:
1.Check displayPrm.forceFieldSeparatedInputMode is FALSE.
2. Check you are setting correct SwMs outRes and Display outRes.The issue looks to be wrong swms output Res
3. Check your TV is reporting the display resolution correctly
4. Try starting usecase with this resolution instead of switching to this resolution.
5. Check you are setting displayPrm.displayId = DISPLAY_LINK_DISPLAY_AUTO_SELECT
Hey Badri,
Thank you for your suggestions.
1080i60 and 720p60 display work perfectly on our system so it is not a matter of patching for Interlaced output.
1. forceFieldSeparatedInputMode is false in our usecase.
2. The SwMs outRes and Display outRes are correct. In fact, If I put up the colorbars the display output looks good.
3. The display resolutions is correct on the display.
4. Starting the usecase with this resolution yields the same results.
5. displayPrm.displayId is set to DISPLAY_LINK_DISPLAY_AUTO_SELECT.
A few more data points:
If I set the pixel clock to 74160 instead of 74176 the both 720p59.94 and 1080i59.94 look OK. Unfortunately, no broadcast equipment will lock to this signal so I need to figure out how to get it working with the proper clocks.
The frame buffer exhibits the same behavior so since color bars look good this points to the issue being in the blender.
The error here is about 266 clocks per frame. This equates to about 1/4 pixel per line for 720p. The VESA specification allows jitter up to 1/4 pixel per line (I know we are looking at CEA here, but included VESA for comparison)
What is the tolerance you need?
Are you looking at the analog output, HDMI or the digital outputs?
You say test mode color bars look OK. Is this true for your broadcast receivers too, or are you stating that you do not expect broadcast systems to lock to the 74160 signal?
I agree though that if the test pattern color bars look good but the frame buffer does not then it is not a timing issue (i.e. not the VENC) but the HDVPSS front end that is at fault.
BR,
Steve
Hey Steve,
If I set the pixel clock to 74176 (N=24 M=2318 M2=25 SD=8 hsmode=2) our broadcast equipment locks to the signal. The issue is (I suspect) that the blender is not handling the clock correctly at this PLL setting and is always under-running. The blender doesn't start working properly until I turn the clock down to 74160.
We are currently looking at the DVO2 output the goal is to have the DVO2 and HDMI both working simultaneously.
Rob
I think there must be something else wrong then. The video pipes are clock agnostic. Changing the clock should have zero effect on things so my guess is that either the PLL is being completely mis-configured, or the blender/VPDMA/front end is somehow being configured differently for each mode, which it shouldn't since all the front end processing really only cares about active image size.
I am not an expert on the HDVPSS front end unfortunately, so can't comment more.
Can you try using the HDMI output instead to see if you get the same behavior?
Are you able to try changing the timings from the one that works to the one that doesn't but through sysfs rather than direct programming?
It might be worthwhile Badri to try the timings on the EVM for the HDMI output too.
BR,
Steve
I have come across a semi-solution. If I do DVO2 output only everything seems to work. My testing up to this point I have had HDMI and DVO2 tied. So it appears there is some instability at 74176 clocks in the blender when there are tied vencs. Is this a known issue?
In the mean time I'll try to get an HDMI only configuration running as well.
Rob
When enabling only the HDMI output the TMDS rate is suspiciously doubled on the ouput for both 720p59.94 and 1080i59.94. This is probably the causing the issue when tied with DVO2 as well. I have not figured out the cause yet. The HDMI PLL seems to be set to the right frequency. Perhaps it is doubled elsewhere?
Rob
I was eventually able to get HDMI output working for 720p59.94 and 1080i59.94. The culprit is the HDMI being forced to use CLKOUTDC0 for all output frequencies greater than 50000KHz. The frequency the getdividers() function was selecting required a post divider which gets bypassed. Unfortunately, using CLKOUTLD0 causes ODC timeout errors. I assume this is the reason for the limitation. So only using CLKOUTDC0 the closest I can get to 741760KHz is 7417390KHz. This is close enough for our hardware to lock to the signal. Some hardware may have trouble with it.
7417390KHz is also not close enough to allow the use of DVO2 and HDMI at the same time. I assume I will have to use the FRACDIV bits on the DVO2 PLL to get close enough to allow tied operation.
Are the clock input limitations of the HDMI_VENC for the 8107 documented somewhere? I didn't see this mentioned in the TRM.
Thanks for your help.
Rob
Rob,
Unfortunately I don't know enough about the internal clocking limitations.
Now that you have narrowed the issue down could I suggest that you post a new question to the forum which focuses on the clocking limitations so that someone who knows this better might be able to respond?
BR,
Steve
Hi,
I also have the same issue.
I can switch to interlace mode, but if I switch back to progressive, I will get the error message.
[m3vpss ] 38007: Assertion @ Line: 2543 in drivers/display/src/vpsdrv_display.c: (NULL != bmObj->semiPrgmedBuf) : failed !!!
Do you have any idea ?
thanks.