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OMAP3530 PoP Balls Missing In Pin List

Other Parts Discussed in Thread: OMAP3530

Hello.  I have been creating a better OMAP3530 CBB symbol than the one currently supplied by TI and I have noticed that not all of the PoP balls show connections to bottom balls.  Are these balls no-connects even though some of them are power balls?  For example, PoP A4 (Vdd), B4 (Vss), C23 (Vddq), etc., do not show any feed-through to bottom pins of the CBB part.  I do see these pins listed in the Table 2-25 of the datasheet (SPRS507F) and that they are connected somehow to power rails but I do not understand how they are attached to these power rails.  Other power pins of the PoP are feed-throughs to bottom pins (e.g., PoP H22 (Vss), H23 (Vdd), L1 (Vcc), etc., which need to be connected to the appropriate power rail.  Please clarify.

Regards,

Charles

  • Charles McCarthy said:
    I have noticed that not all of the PoP balls show connections to bottom balls.  Are these balls no-connects even though some of them are power balls?

    This does appear to be the case, I am not sure why there is no through connection to a bottom ball with these pins, though the states as power/ground pins are given so I would expect them to be connected internally somehow to do so. For the purposes of making a more in depth symbol you could probably get by with an implied connection to an equivalent bottom rail pin.

    In general this has not mattered much since the CBB package uses a standard PoP memory device with fixed connections to these pins. On the other hand I have also heard of boards with the CBB package that are not using PoP (but rather 'on the board' discrete memories), therefore all the top pins should be ok if left floating.

  • Bernie, thanks for the reply.  I am primarily wanting to confirm that the PoP balls do indeed have connections to the appropriate supplies, in the event that higher density memories may become available and might require more power.  Having the additional power balls attached provides better power distribution to the PoP.

    I am primarily concerned that some of the balls are somehow directly connected to the power rails vs. feeding-through and then to the power rail.  The feeding-through and then attaching to a power rail allows for some power filtering, if so desired.  For example, all of the PoP DDR_VDD I/O rail pins (e.g., PoP A4, A7, etc.) (according to the Micron datasheet) are somehow directly connected to VDD_MEM on the OMAP.  Similarly, all of the PoP VSS I/O rail pins (e.g., PoP B4, B7, etc.) are somehow directly connected to the OMAP Vss rail and two of the FLASH_VCC balls (PoP P1 and AC5) are directly connect to VDD_MEM.  I would think that each of these different rails would be connected to the existing feed-through balls rather than to the OMAP power rails directly.

    Is it possible for you to confirm inside TI that the balls are connected according to Table 2-25 in the datasheet (SPRS507F)?  It may be they are connected in the package substrate to the feed-throughs rather than to the OMAP power rails directly.

    Thanks,

    Charles

  • I can certainly ask if there are real feed-throughs for the PoP balls you mention, the potential for higher power PoP power distribution and filtering on those specific supplies are good arguments for providing the information. I will post back here with what I hear back (or someone else more familiar with the package innards will post instead).

  • From the response from the factory it looks like the pins are simply connected to the internal rails of the OMAP3, and not directly to specific feed through through pins, so filtering for those specific supplies would not be possible, at least without filtering the entire rail. On the other hand this does verify that the power supply balls on the PoP side are powered and providing an even distribution to the PoP memory.

  • Bernie, thanks for looking into this!  You might want to pass onto whomever updates the datasheet that they should maybe add footnotes on Table 2-25 of the datasheet indicating that these CBB Top balls are directly connected to the VDDS_MEM and VSS rails internal to the device.

    Regards,

    Charles