TI AM335x SPI Slave device Access

Sithick HAneefa

Hi Sitara Team,

From AM335x General Purpose EVM board Schematics we found that SPI NOR Flash signals(SPI0_CS0,SPI0_CLK,SPI0_D0,SPI0_D1,SPI0_CS1) are routed through Altera FPGA.

We are trying to use SPI Slave device on SPI0_CS1,so is it necessary to have FPGA code running to map these signals.

If so Is there any default FPGA code available to share.

Currently we couldn't able to access SPI Winbond NOR Flash also.

Please share your thoughts on this.

Regards

Sithick H

over 11 years ago

0 Biser Gatchev-XID over 11 years ago

TI__Guru**** 393215 points

Hi Sithick,

The CPLD source files can be found here: http://processors.wiki.ti.com/index.php/AM335x_General_Purpose_EVM_CPLD

0 Sithick HAneefa over 11 years ago in reply to Biser Gatchev-XID

Prodigy 160 points

Hi Biser,

Thanks for your immediate support on CPLD code.

We are in the process of modifying and flashing CPLD code.

To do exact rollback to initial CPLD code stage,it would be great if you can share exact CPLD code currently running on am335x 1.4a Revision board as below.

Board Name : A33515B
Board Version : 1.4A
SoC Version : 0
CM3 Firmware Version: 385

Regards

Sithick H

0 Biser Gatchev-XID over 11 years ago in reply to Sithick HAneefa

TI__Guru**** 393215 points

I think Rev. 1.0F is the latest CPLD code.

0 Sithick HAneefa over 11 years ago in reply to Biser Gatchev-XID

Prodigy 160 points

Hi Biser,

Thank you for your feedback.

Below link says EVM with Rev. 1.3 LCD Board

http://processors.wiki.ti.com/index.php/AM335x_General_Purpose_EVM_CPLD

But we have 1.4A version,Can you confirm CPLD 1.0F will be the correct default factory cpld code to flash.

Regards

Sithick H

0 Biser Gatchev-XID over 11 years ago in reply to Sithick HAneefa

TI__Guru**** 393215 points

What is the revision of your daugtherboard? You may need to lift up the LCD board to see it.

0 Sithick HAneefa over 11 years ago in reply to Biser Gatchev-XID

Prodigy 160 points

AM335x GP Daughterboard

Rev 1.2A

Assem PN 4P0013

SNO 33124P130315

Regards

Sithick H

0 Biser Gatchev-XID over 11 years ago in reply to Sithick HAneefa

TI__Guru**** 393215 points

Rev. 1.0G should be the CPLD code for your board. I will ask to see if it is available.

0 Sithick HAneefa over 11 years ago in reply to Biser Gatchev-XID

Prodigy 160 points

Hi Biser,

Can you describe about the relationship between PinMux Utility(2.5.2.0) mapping and AM335x EVM 1.4A Profile switch setting mapping.

Also we have attached excel sheet referring "AM335x GP EVM Pin Use Assignments"

Regards

Sithick H

am335x_gpevm_pinuse.xlsx

0 Biser Gatchev-XID over 11 years ago in reply to Sithick HAneefa

TI__Guru**** 393215 points

This Excel sheet shows how the CPLD maps the AM335X signals for each profile. The pinmux setting for all profiles can be found here: http://processors.wiki.ti.com/index.php/AM335x_General_Purpose_EVM_Pinmux

0 Sithick HAneefa over 11 years ago in reply to Biser Gatchev-XID

Prodigy 160 points

Hi Biser,

Thanks for sharing valuable info.

I hope it is for daughter board 1.1A

Please help us to get the same for our daughter board 1.2A

Also Is there is any dependency on boot mode switch settings on this pinmuxing irrespective of u-boot code flow.

Regards

Sithick H

0 Biser Gatchev-XID over 11 years ago in reply to Sithick HAneefa

TI__Guru**** 393215 points

The AM335X pinmuxing is related only to the EVM profile. I am waiting for information about the CPLD Rev.1.0G code availability (which is for daugtherboard 1.2A).

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TI AM335x SPI Slave device Access